riscv/rocket-chip
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3 Commits

Author SHA1 Message Date
Andrew Waterman
8308345364 work in progress on hellacache 2011-12-10 07:01:47 -08:00
Andrew Waterman
ce201559f3 Support cache->cpu nacks one cycle after request 2011-12-10 00:42:09 -08:00
Andrew Waterman
c01e1f1cef Don't replay from EX stage. 
EX replays are now handled from MEM.  We may move them to WB.
 2011-12-09 19:42:58 -08:00