Yunsup Lee
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7afd630d3e
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add multiclock support to Coreplex
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2016-09-21 16:55:26 -07:00 |
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Andrew Waterman
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8e63f4a1a5
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Remove ClockToSignal and vice-versa
Clock.asUInt and Bool.asClock now suffice.
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2016-09-21 16:17:14 -07:00 |
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Henry Cook
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d35060b881
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[junctions] messed up the merge lulz
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2016-09-14 17:55:16 -07:00 |
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Henry Cook
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1b53e477fa
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Merge branch 'master' of github.com:ucb-bar/rocket-chip into tl2-irrevocable
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2016-09-14 17:50:17 -07:00 |
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Henry Cook
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08c4c7b985
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[junctions] make async crossings capable of providing IrrevocableIO
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2016-09-14 17:38:54 -07:00 |
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Megan Wachs
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1308680f75
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Add some async/clock utilities
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2016-09-14 16:30:59 -07:00 |
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Wesley W. Terpstra
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3348236320
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junctions: remove obsolete Handshaker crossing
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2016-09-13 18:33:56 -07:00 |
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Wesley W. Terpstra
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8142406d2e
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junctions: refactor the Crossing type
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2016-09-13 15:51:18 -07:00 |
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Wesley W. Terpstra
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ecdfb528c5
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crossing: refactor AsyncDecoupled to provide AsyncDecoupledCrossing with no clock domain
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2016-09-13 15:51:18 -07:00 |
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Howard Mao
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7b20609d4d
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reorganize moving non-submodule packages into src/main/scala
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2016-08-19 13:45:23 -07:00 |
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