RegField: add name and description fields
In the future we can generate interesting documentation and headers.
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@ -77,7 +77,7 @@ object RegWriteFn
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implicit def apply(x: Unit): RegWriteFn = RegWriteFn((valid, data) => { Bool(true) })
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}
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case class RegField(width: Int, read: RegReadFn, write: RegWriteFn)
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case class RegField(width: Int, read: RegReadFn, write: RegWriteFn, name: String, description: String)
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{
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require (width > 0)
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def pipelined = !read.combinational || !write.combinational
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@ -88,10 +88,12 @@ object RegField
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// Byte address => sequence of bitfields, lowest index => lowest address
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type Map = (Int, Seq[RegField])
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def apply(n: Int) : RegField = apply(n, (), ())
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def apply(n: Int, rw: UInt) : RegField = apply(n, rw, rw)
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def r(n: Int, r: RegReadFn) : RegField = apply(n, r, ())
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def w(n: Int, w: RegWriteFn) : RegField = apply(n, (), w)
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def apply(n: Int) : RegField = apply(n, (), (), "", "")
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def apply(n: Int, r: RegReadFn, w: RegWriteFn) : RegField = apply(n, r, w, "", "")
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def apply(n: Int, rw: UInt) : RegField = apply(n, rw, rw, "", "")
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def apply(n: Int, rw: UInt, name: String, description: String) : RegField = apply(n, rw, rw, name, description)
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def r(n: Int, r: RegReadFn, name: String = "", description: String = "") : RegField = apply(n, r, (), name, description)
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def w(n: Int, w: RegWriteFn, name: String = "", description: String = "") : RegField = apply(n, (), w, name, description)
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// This RegField allows 'set' to set bits in 'reg'.
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// and to clear bits when the bus writes bits of value 1.
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