make sure PseudoLRU is given power of 2 ways
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@ -82,6 +82,7 @@ class SeqRandom(n_ways: Int) extends SeqReplacementPolicy {
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class PseudoLRU(n: Int)
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class PseudoLRU(n: Int)
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{
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{
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require(isPow2(n))
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val state_reg = Reg(Bits(width = n))
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val state_reg = Reg(Bits(width = n))
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def access(way: UInt) {
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def access(way: UInt) {
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state_reg := get_next_state(state_reg,way)
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state_reg := get_next_state(state_reg,way)
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