Merge pull request #944 from freechipsproject/fix-vlsi-mem-gen
memgen: also randomize ren and rand register
This commit is contained in:
commit
fb2c22ca80
@ -101,6 +101,13 @@ def gen_mem(name, width, depth, mask_gran, mask_seg, ports):
|
||||
sequential.append(' if (%s) reg_%saddr <= %saddr;' % (en, prefix, prefix))
|
||||
combinational.append('`ifdef RANDOMIZE_GARBAGE_ASSIGN')
|
||||
combinational.append('reg [%d:0] %srandom;' % (((width-1)//32+1)*32-1, prefix))
|
||||
combinational.append('`ifdef RANDOMIZE_MEM_INIT')
|
||||
combinational.append(' initial begin')
|
||||
combinational.append(' #0.002 begin end')
|
||||
combinational.append(' %srandom = {%s};' % (prefix, ', '.join(['$random'] * ((width-1)//32+1))))
|
||||
combinational.append(' reg_%sren = %srandom[0];' % (prefix, prefix))
|
||||
combinational.append(' end')
|
||||
combinational.append('`endif')
|
||||
combinational.append('always @(posedge %sclk) %srandom <= {%s};' % (prefix, prefix, ', '.join(['$random'] * ((width-1)//32+1))))
|
||||
combinational.append('assign %s = reg_%sren ? ram[reg_%saddr] : %srandom[%d:0];' % (data, prefix, prefix, prefix, width-1))
|
||||
combinational.append('`else')
|
||||
|
Loading…
Reference in New Issue
Block a user