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PositionalMultiQueue: use 1-write n-read Mem instead of Reg(Vec(...))

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Wesley W. Terpstra 2016-11-22 18:46:11 -08:00
parent d9a203b0f0
commit f9de7173cc
1 changed files with 2 additions and 2 deletions
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src/main/scala/util/PositionalMultiQueue.scala
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@ -35,8 +35,8 @@ class PositionalMultiQueue[T <: Data](params: PositionalMultiQueueParameters[T],
val empty = RegInit(Vec.fill(params.ways) { Bool(true) }) val empty = RegInit(Vec.fill(params.ways) { Bool(true) })
val head = Reg(Vec(params.ways, UInt(width = log2Up(params.positions)))) val head = Reg(Vec(params.ways, UInt(width = log2Up(params.positions))))
val tail = Reg(Vec(params.ways, UInt(width = log2Up(params.positions)))) val tail = Reg(Vec(params.ways, UInt(width = log2Up(params.positions))))
val next = Reg(Vec(params.positions, UInt(width = log2Up(params.positions)))) val next = Mem(params.positions, UInt(width = log2Up(params.positions)))
val data = Reg(Vec(params.positions, params.gen)) val data = Mem(params.positions, params.gen)
// optimized away for synthesis; used to confirm invariant // optimized away for synthesis; used to confirm invariant
val guard = RegInit(Vec.fill(params.positions) { Bool(false) }) val guard = RegInit(Vec.fill(params.positions) { Bool(false) })