riscv/rocket-chip
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Use <> instead of := for bi-directional connections

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This commit is contained in:
Andrew Waterman
2016-10-04 22:28:56 -07:00
parent 4f6eb38eeb
commit eddf1679f5
10 changed files with 28 additions and 28 deletions
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src/main/scala/rocket/dcache.scala
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@ -431,7 +431,7 @@ class DCache(implicit p: Parameters) extends L1HellaCacheModule()(p) {
// cached response
io.cpu.resp.valid := s2_valid_hit
io.cpu.resp.bits := s2_req
io.cpu.resp.bits <> s2_req
io.cpu.resp.bits.has_data := s2_read
io.cpu.resp.bits.replay := false
io.cpu.ordered := !(s1_valid || s2_valid || cached_grant_wait || uncachedInFlight.asUInt.orR)