riscv/rocket-chip
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Bits -> UInt

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This commit is contained in:
Andrew Waterman 2015-07-30 23:56:47 -07:00
parent c27945c094
commit eb57433f43
1 changed files with 1 additions and 1 deletions
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junctions/src/main/scala/hasti.scala
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@ -31,7 +31,7 @@ abstract trait HASTIConstants
val SZ_HADDR = 32
val SZ_HDATA = 32
def dgate(valid: Bool, b: Bits) = Fill(b.getWidth, valid) & b
def dgate(valid: Bool, b: UInt) = Fill(b.getWidth, valid) & b
}
class HASTIMasterIO extends Bundle