riscv/rocket-chip
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add Zscale testing

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This commit is contained in:
Yunsup Lee
2015-07-17 12:02:02 -07:00
parent 1e977d12f2
commit e7802825c3
7 changed files with 113 additions and 6 deletions
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2
src/main/scala/Configs.scala
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@ -218,6 +218,8 @@ class WithZscale extends ChiselConfig(
(r: Bool) => Module(new Zscale(r), {case TLId => "L1ToL2"})
}
case UseZscale => true
case BootROMCapacity => Dump("BOOT_CAPACITY", 16*1024)
case DRAMCapacity => Dump("DRAM_CAPACITY", 64*1024*1024)
}
)

6
src/main/scala/ZscaleChip.scala
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@ -9,6 +9,8 @@ import zscale._
case object UseZscale extends Field[Boolean]
case object BuildZscale extends Field[(Bool) => Zscale]
case object BootROMCapacity extends Field[Int]
case object DRAMCapacity extends Field[Int]
class ZscaleSystem extends Module {
val io = new Bundle {
@ -63,8 +65,8 @@ class ZscaleTop extends Module {
}
val sys = Module(new ZscaleSystem)
val bootmem = Module(new HASTISRAM(4096))
val dram = Module(new HASTISRAM(4194304))
val bootmem = Module(new HASTISRAM(params(BootROMCapacity)/4))
val dram = Module(new HASTISRAM(params(DRAMCapacity)/4))
sys.io.host <> io.host
bootmem.io <> sys.io.bootmem