changed branch addr generation to get it off critical path
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cf1965493b
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@ -37,6 +37,8 @@ class ioCtrlDpath extends Bundle()
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val mem_eret = Bool('output);
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val mem_load = Bool('output);
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val wen = Bool('output);
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// instruction in execute is an unconditional jump
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val ex_jmp = Bool('output);
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// enable/disable interrupts
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val irq_enable = Bool('output);
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val irq_disable = Bool('output);
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@ -411,6 +413,7 @@ class rocketCtrl extends Component
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ex_reg_xcpt_syscall <== id_syscall.toBool;
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}
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val beq = io.dpath.br_eq;
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val bne = ~io.dpath.br_eq;
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val blt = io.dpath.br_lt;
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@ -428,6 +431,7 @@ class rocketCtrl extends Component
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val jr_taken = (ex_reg_br_type === BR_JR);
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val j_taken = (ex_reg_br_type === BR_J);
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io.dpath.ex_jmp := j_taken;
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io.dmem.req_val := ex_reg_mem_val && ~io.dpath.killx;
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io.dmem.req_cmd := ex_reg_mem_cmd;
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@ -538,9 +542,9 @@ class rocketCtrl extends Component
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Mux(mem_reg_eret, PC_PCR, // eret instruction
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Mux(replay_ex, PC_EX, // D$ blocked, D$ miss, privileged inst
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Mux(!ex_reg_btb_hit && br_taken, PC_BR, // mispredicted taken branch
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Mux(j_taken, PC_BR, // jump
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Mux(ex_reg_btb_hit && !br_taken, PC_EX4, // mispredicted not taken branch
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Mux(jr_taken, PC_JR, // jump register
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Mux(j_taken, PC_J, // jump
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Mux(io.dpath.btb_hit, PC_BTB, // predicted PC from BTB
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PC_4))))))))); // PC+4
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@ -127,8 +127,8 @@ class rocketDpath extends Component
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// FIXME: which bits to extract should be calculated based on VADDR_BITS
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val branch_adder_rhs =
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Mux(io.ctrl.sel_pc === PC_BR, Cat(ex_sign_extend_split(41,0), UFix(0, 1)),
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Cat(Fill(17, ex_reg_inst(31)), ex_reg_inst(31,7), UFix(0, 1)));
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Mux(io.ctrl.ex_jmp, Cat(Fill(17, ex_reg_inst(31)), ex_reg_inst(31,7), UFix(0,1)),
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Cat(ex_sign_extend_split(41,0), UFix(0, 1)));
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val ex_branch_target = ex_reg_pc + branch_adder_rhs.toUFix;
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@ -140,12 +140,11 @@ class rocketDpath extends Component
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Mux(io.ctrl.sel_pc === PC_EX, ex_reg_pc,
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Mux(io.ctrl.sel_pc === PC_EX4, ex_reg_pc_plus4,
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Mux(io.ctrl.sel_pc === PC_BR, ex_branch_target,
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Mux(io.ctrl.sel_pc === PC_J, ex_branch_target,
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Mux(io.ctrl.sel_pc === PC_JR, ex_jr_target.toUFix,
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Mux(io.ctrl.sel_pc === PC_PCR, mem_reg_wdata(VADDR_BITS-1,0), // only used for ERET
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Mux(io.ctrl.sel_pc === PC_EVEC, pcr.io.evec,
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Mux(io.ctrl.sel_pc === PC_MEM, mem_reg_pc,
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UFix(0, VADDR_BITS)))))))))));
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UFix(0, VADDR_BITS))))))))));
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when (!io.ctrl.stallf && io.host.start) {
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if_reg_pc <== if_next_pc.toUFix;
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