rocketchip: work-around ucb-bar/chisel3#472
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@ -291,10 +291,10 @@ class TLBroadcastTracker(id: Int, lineBytes: Int, probeCountBits: Int, bufferles
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object TLBroadcastConstants
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{
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val TRANSFORM_T = UInt(3)
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val TRANSFORM_B = UInt(2)
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val DROP = UInt(1)
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val PASS = UInt(0)
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def TRANSFORM_T = UInt(3)
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def TRANSFORM_B = UInt(2)
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def DROP = UInt(1)
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def PASS = UInt(0)
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}
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class TLBroadcastData(params: TLBundleParameters) extends TLBundleBase(params)
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@ -16,25 +16,25 @@ abstract class TLBundleBase(params: TLBundleParameters) extends GenericParameter
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object TLMessages
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{
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// A B C D E
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val PutFullData = UInt(0) // . . => AccessAck
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val PutPartialData = UInt(1) // . . => AccessAck
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val ArithmeticData = UInt(2) // . . => AccessAckData
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val LogicalData = UInt(3) // . . => AccessAckData
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val Get = UInt(4) // . . => AccessAckData
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val Hint = UInt(5) // . . => HintAck
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val Acquire = UInt(6) // . => Grant[Data]
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val Probe = UInt(6) // . => ProbeAck[Data]
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val AccessAck = UInt(0) // . .
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val AccessAckData = UInt(1) // . .
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val HintAck = UInt(2) // . .
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val ProbeAck = UInt(4) // .
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val ProbeAckData = UInt(5) // .
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val Release = UInt(6) // . => ReleaseAck
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val ReleaseData = UInt(7) // . => ReleaseAck
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val Grant = UInt(4) // . => GrantAck
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val GrantData = UInt(5) // . => GrantAck
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val ReleaseAck = UInt(6) // .
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val GrantAck = UInt(0) // .
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def PutFullData = UInt(0) // . . => AccessAck
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def PutPartialData = UInt(1) // . . => AccessAck
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def ArithmeticData = UInt(2) // . . => AccessAckData
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def LogicalData = UInt(3) // . . => AccessAckData
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def Get = UInt(4) // . . => AccessAckData
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def Hint = UInt(5) // . . => HintAck
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def Acquire = UInt(6) // . => Grant[Data]
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def Probe = UInt(6) // . => ProbeAck[Data]
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def AccessAck = UInt(0) // . .
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def AccessAckData = UInt(1) // . .
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def HintAck = UInt(2) // . .
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def ProbeAck = UInt(4) // .
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def ProbeAckData = UInt(5) // .
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def Release = UInt(6) // . => ReleaseAck
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def ReleaseData = UInt(7) // . => ReleaseAck
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def Grant = UInt(4) // . => GrantAck
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def GrantData = UInt(5) // . => GrantAck
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def ReleaseAck = UInt(6) // .
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def GrantAck = UInt(0) // .
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def isA(x: UInt) = x <= Acquire
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def isB(x: UInt) = x <= Probe
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@ -58,27 +58,27 @@ object TLPermissions
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val cWidth = 3
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// Cap types (Grant = new permissions, Probe = permisions <= target)
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val toT = UInt(0, bdWidth)
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val toB = UInt(1, bdWidth)
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val toN = UInt(2, bdWidth)
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def toT = UInt(0, bdWidth)
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def toB = UInt(1, bdWidth)
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def toN = UInt(2, bdWidth)
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def isCap(x: UInt) = x <= toN
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// Grow types (Acquire = permissions >= target)
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val NtoB = UInt(0, aWidth)
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val NtoT = UInt(1, aWidth)
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val BtoT = UInt(2, aWidth)
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def NtoB = UInt(0, aWidth)
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def NtoT = UInt(1, aWidth)
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def BtoT = UInt(2, aWidth)
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def isGrow(x: UInt) = x <= BtoT
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// Shrink types (ProbeAck, Release)
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val TtoB = UInt(0, cWidth)
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val TtoN = UInt(1, cWidth)
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val BtoN = UInt(2, cWidth)
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def TtoB = UInt(0, cWidth)
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def TtoN = UInt(1, cWidth)
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def BtoN = UInt(2, cWidth)
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def isShrink(x: UInt) = x <= BtoN
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// Report types (ProbeAck)
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val TtoT = UInt(3, cWidth)
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val BtoB = UInt(4, cWidth)
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val NtoN = UInt(5, cWidth)
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def TtoT = UInt(3, cWidth)
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def BtoB = UInt(4, cWidth)
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def NtoN = UInt(5, cWidth)
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def isReport(x: UInt) = x <= NtoN
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}
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@ -87,18 +87,18 @@ object TLAtomics
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val width = 3
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// Arithmetic types
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val MIN = UInt(0, width)
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val MAX = UInt(1, width)
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val MINU = UInt(2, width)
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val MAXU = UInt(3, width)
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val ADD = UInt(4, width)
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def MIN = UInt(0, width)
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def MAX = UInt(1, width)
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def MINU = UInt(2, width)
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def MAXU = UInt(3, width)
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def ADD = UInt(4, width)
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def isArithmetic(x: UInt) = x <= ADD
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// Logical types
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val XOR = UInt(0, width)
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val OR = UInt(1, width)
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val AND = UInt(2, width)
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val SWAP = UInt(3, width)
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def XOR = UInt(0, width)
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def OR = UInt(1, width)
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def AND = UInt(2, width)
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def SWAP = UInt(3, width)
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def isLogical(x: UInt) = x <= SWAP
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}
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@ -106,8 +106,8 @@ object TLHints
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{
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val width = 1
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val PREFETCH_READ = UInt(0, width)
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val PREFETCH_WRITE = UInt(1, width)
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def PREFETCH_READ = UInt(0, width)
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def PREFETCH_WRITE = UInt(1, width)
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}
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sealed trait TLChannel extends TLBundleBase {
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@ -11,10 +11,10 @@ import uncore.constants.MemoryOpConstants
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object ClientStates {
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val width = 2
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val Nothing = UInt(0, width)
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val Branch = UInt(1, width)
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val Trunk = UInt(2, width)
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val Dirty = UInt(3, width)
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def Nothing = UInt(0, width)
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def Branch = UInt(1, width)
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def Trunk = UInt(2, width)
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def Dirty = UInt(3, width)
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def hasReadPermission(state: UInt): Bool = state > Nothing
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def hasWritePermission(state: UInt): Bool = state > Branch
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