riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

Address Map refactoring

Browse Source
This commit is contained in:
Andrew Waterman
2016-04-28 16:08:32 -07:00
parent c8b1f0801b
commit e4ace55d77
2 changed files with 72 additions and 81 deletions
Download Patch File Download Diff File Expand all files Collapse all files

99
junctions/src/main/scala/addrmap.scala
View File

@ -32,25 +32,30 @@ trait HasAddrMapParameters {
val addrMap = new AddrHashMap(p(GlobalAddrMap))
}
case class MemAttr(prot: Int, cacheable: Boolean = false)
abstract class MemRegion {
def align: BigInt
def size: BigInt
def numSlaves: Int
}
case class MemSize(size: BigInt, prot: Int, cacheable: Boolean = false) extends MemRegion {
case class MemSize(size: BigInt, align: BigInt, attr: MemAttr) extends MemRegion {
def numSlaves = 1
}
case class MemSubmap(size: BigInt, entries: AddrMap) extends MemRegion {
val numSlaves = entries.countSlaves
val align = entries.computeAlign
}
object AddrMapConsts {
object AddrMapProt {
val R = 0x1
val W = 0x2
val X = 0x4
val RW = R | W
val RX = R | X
val RWX = R | W | X
val SZ = 3
}
class AddrMapProt extends Bundle {
@ -61,15 +66,21 @@ class AddrMapProt extends Bundle {
case class AddrMapEntry(name: String, region: MemRegion)
case class AddrHashMapEntry(port: Int, start: BigInt, size: BigInt, prot: Int, cacheable: Boolean)
case class AddrHashMapEntry(port: Int, start: BigInt, region: MemRegion)
class AddrMap(entries: Seq[AddrMapEntry]) extends scala.collection.IndexedSeq[AddrMapEntry] {
private val hash = HashMap(entries.map(e => (e.name, e.region)):_*)
def apply(index: Int): AddrMapEntry = entries(index)
def length: Int = entries.size
def countSlaves: Int = entries.map(_.region.numSlaves).foldLeft(0)(_ + _)
def computeSize: BigInt = new AddrHashMap(this).size
def computeAlign: BigInt = entries.map(_.region.align).foldLeft(BigInt(1))(_ max _)
override def tail: AddrMap = new AddrMap(entries.tail)
}
@ -78,68 +89,68 @@ object AddrMap {
}
class AddrHashMap(addrmap: AddrMap, start: BigInt = BigInt(0)) {
val mapping = new HashMap[String, AddrHashMapEntry]
private val mapping = HashMap[String, AddrHashMapEntry]()
private val subMaps = HashMap[String, AddrHashMapEntry]()
private def genPairs(am: AddrMap, start: BigInt): Seq[(String, AddrHashMapEntry)] = {
var ind = 0
private def genPairs(am: AddrMap, start: BigInt, startIdx: Int, prefix: String): (BigInt, Int) = {
var ind = startIdx
var base = start
var pairs = Seq[(String, AddrHashMapEntry)]()
am.foreach {
case AddrMapEntry(name, MemSize(size, prot, cacheable)) =>
pairs = (name, AddrHashMapEntry(ind, base, size, prot, cacheable)) +: pairs
base += size
am.foreach { ame =>
val name = prefix + ame.name
base = (base + ame.region.align - 1) / ame.region.align * ame.region.align
ame.region match {
case r: MemSize =>
mapping += name -> AddrHashMapEntry(ind, base, r)
base += r.size
ind += 1
case AddrMapEntry(name, MemSubmap(size, submap)) =>
val subpairs = genPairs(submap, base).map {
case (subname, AddrHashMapEntry(subind, subbase, subsize, prot, cacheable)) =>
(name + ":" + subname,
AddrHashMapEntry(ind + subind, subbase, subsize, prot, cacheable))
}
pairs = subpairs ++ pairs
ind += subpairs.size
base += size
}
pairs
case r: MemSubmap =>
subMaps += name -> AddrHashMapEntry(-1, base, r)
ind = genPairs(r.entries, base, ind, name + ":")._2
base += r.size
}}
(base, ind)
}
for ((name, ind) <- genPairs(addrmap, start)) { mapping(name) = ind }
val size = genPairs(addrmap, start, 0, "")._1
def nEntries: Int = mapping.size
def apply(name: String): AddrHashMapEntry = mapping(name)
def get(name: String): Option[AddrHashMapEntry] = mapping.get(name)
def sortedEntries(): Seq[(String, BigInt, BigInt, Int, Boolean)] = {
val arr = new Array[(String, BigInt, BigInt, Int, Boolean)](mapping.size)
mapping.foreach { case (name, AddrHashMapEntry(port, base, size, prot, cacheable)) =>
arr(port) = (name, base, size, prot, cacheable)
val sortedEntries: Seq[(String, BigInt, MemSize)] = {
val arr = new Array[(String, BigInt, MemSize)](mapping.size)
mapping.foreach { case (name, AddrHashMapEntry(port, base, region)) =>
arr(port) = (name, base, region.asInstanceOf[MemSize])
}
arr.toSeq
}
def nEntries: Int = mapping.size
def apply(name: String): AddrHashMapEntry = mapping.getOrElse(name, subMaps(name))
def subMap(name: String): (BigInt, AddrMap) = {
val m = subMaps(name)
(m.start, m.region.asInstanceOf[MemSubmap].entries)
}
def isInRegion(name: String, addr: UInt): Bool = {
val start = mapping(name).start
val size = mapping(name).size
val size = mapping(name).region.size
UInt(start) <= addr && addr < UInt(start + size)
}
def isCacheable(addr: UInt): Bool = {
sortedEntries().map { case (_, base, size, _, cacheable) =>
UInt(base) <= addr && addr < UInt(base + size) && Bool(cacheable)
}.reduce(_ || _)
sortedEntries.filter(_._3.attr.cacheable).map { case (_, base, region) =>
UInt(base) <= addr && addr < UInt(base + region.size)
}.foldLeft(Bool(false))(_ || _)
}
def isValid(addr: UInt): Bool = {
addr < UInt(start) || sortedEntries().map {
case (_, base, size, _, _) =>
addr >= UInt(base) && addr < UInt(base + size)
}.reduceLeft(_ || _)
sortedEntries.map { case (_, base, region) =>
addr >= UInt(base) && addr < UInt(base + region.size)
}.foldLeft(Bool(false))(_ || _)
}
def getProt(addr: UInt): AddrMapProt = {
val protBits = Mux(addr < UInt(start),
Bits(AddrMapConsts.RWX, 3),
Mux1H(sortedEntries().map { case (_, base, size, prot, _) =>
(addr >= UInt(base) && addr < UInt(base + size), Bits(prot, 3))
}))
new AddrMapProt().fromBits(protBits)
val protForRegion = sortedEntries.map { case (_, base, region) =>
val inRegion = addr >= UInt(base) && addr < UInt(base + region.size)
Mux(inRegion, UInt(region.attr.prot, AddrMapProt.SZ), UInt(0))
}
new AddrMapProt().fromBits(protForRegion.reduce(_|_))
}
}