riscv/rocket-chip
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generalize page table walker

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also, don't instantiate vitlb when !HAVE_VEC
This commit is contained in:
Andrew Waterman
2012-05-03 02:29:09 -07:00
parent 2d4e5d3813
commit e1f9dc2c1f
3 changed files with 34 additions and 53 deletions
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9
rocket/src/main/scala/util.scala
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@ -256,13 +256,14 @@ class LockingArbiter[T <: Data](n: Int)(data: => T) extends Component {
object PriorityEncoder
{
def apply(in: Bits): UFix = doApply(in, 0)
def doApply(in: Bits, n: Int = 0): UFix = {
if (n >= in.getWidth-1)
def doit(in: Seq[Bits], n: Int): UFix = {
if (n >= in.size-1)
UFix(n)
else
Mux(in(n), UFix(n), doApply(in, n+1))
Mux(in(n), UFix(n), doit(in, n+1))
}
def apply(in: Seq[Bits]): UFix = doit(in, 0)
def apply(in: Bits): UFix = apply((0 until in.getWidth).map(in(_)))
}
object PriorityEncoderOH