riscv/rocket-chip
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remove ext_mem interface

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hindsight is 20/20
This commit is contained in:
Andrew Waterman committed 2012-02-26 18:53:39 -08:00
1 parent 2d04664a98
commit e12b9eae93
4 files changed
+21 -52
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rocket/src/main/scala/consts.scala
+1 -1
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@@ -164,7 +164,7 @@ object Constants
val PERM_BITS = 6;
// rocketNBDCache parameters
val DCACHE_PORTS = 2
val DCACHE_PORTS = 3
val CPU_DATA_BITS = 64;
val CPU_TAG_BITS = 9;
val DCACHE_TAG_BITS = log2up(DCACHE_PORTS) + CPU_TAG_BITS