riscv
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rocket-chip
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Linux works again!

This commit is contained in:
Andrew Waterman 2014-01-16 12:44:29 -08:00
parent d99ee1f9c2
commit dfc13236d1
6 changed files with 8 additions and 8 deletions
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2
chisel

@ -1 +1 @@
Subproject commit 22ab4efe5878b0d6eb324b820ef8cea381698efd
Subproject commit ae1d1de82188f0a1d79a4e8eb613743942a13eb3

6
csrc/emulator.cc
View File

@ -94,7 +94,7 @@ int main(int argc, char** argv)
tile.Top__io_mem_req_data_ready = LIT<1>(mm->req_data_ready());
tile.Top__io_mem_resp_valid = LIT<1>(mm->resp_valid());
tile.Top__io_mem_resp_bits_tag = LIT<64>(mm->resp_tag());
memcpy(&tile.Top__io_mem_resp_bits_data, mm->resp_data(), tile.Top__io_mem_resp_bits_data.width()/8);
memcpy(tile.Top__io_mem_resp_bits_data.values, mm->resp_data(), tile.Top__io_mem_resp_bits_data.width()/8);
tile.clock_lo(LIT<1>(0));
@ -105,7 +105,7 @@ int main(int argc, char** argv)
tile.Top__io_mem_req_cmd_bits_tag.lo_word(),
tile.Top__io_mem_req_data_valid.lo_word(),
&tile.Top__io_mem_req_data_bits_data.values[0],
tile.Top__io_mem_req_data_bits_data.values,
tile.Top__io_mem_resp_ready.to_bool()
);
@ -120,7 +120,7 @@ int main(int argc, char** argv)
tile.Top__io_host_in_bits = LIT<64>(htif_in_bits);
if (tile.Top__io_host_out_valid.to_bool())
htif->send(&tile.Top__io_host_out_bits.values[0], htif_bits/8);
htif->send(tile.Top__io_host_out_bits.values, htif_bits/8);
tile.Top__io_host_out_ready = LIT<1>(1);
}

2
riscv-tests

@ -1 +1 @@
Subproject commit b374fd10b2b36124bb6813211a7ec690e1fa8350
Subproject commit d710b4ba5d3405a338d133f77f5d19bd12a4e8b7

2
riscv-tools

@ -1 +1 @@
Subproject commit 20ff67d56c3b505b99e531d48954c2c292a2fa99
Subproject commit fb38473be6f843cc492e03a0669ed60df7d05c5c

2
rocket

@ -1 +1 @@
Subproject commit 6554ed321ceef75af96aeab6a4d8a2b9d90c0d1d
Subproject commit 2249bbfbdebdd6f2a02c34793024332a08c9167d

2
uncore

@ -1 +1 @@
Subproject commit 2a21e8435a0b58ca588bfda0ab11b54e08efe3bd
Subproject commit a58265755fcb90aebe5377cb9b7343732fd14b9a