riscv/rocket-chip
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arbiter probe ready bugfix

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Henry Cook committed 2015-03-12 16:02:51 -07:00
1 parent 2c31ed6426
commit dcc84c4dd3
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uncore/src/main/scala/tilelink.scala
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@@ -572,7 +572,7 @@ abstract class TileLinkArbiterLike(val arbN: Int) extends TLModule
mngr: DecoupledIO[LogicalNetworkIO[M]]) { mngr: DecoupledIO[LogicalNetworkIO[M]]) {
clts.map{ _.valid := mngr.valid } clts.map{ _.valid := mngr.valid }
clts.map{ _.bits := mngr.bits } clts.map{ _.bits := mngr.bits }
mngr.ready := clts.map(_.ready).reduce(_||_) mngr.ready := clts.map(_.ready).reduce(_&&_)
} }
} }