riscv/rocket-chip
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last => done

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This commit is contained in:
Henry Cook
2017-03-09 18:56:54 -08:00
committed by Andrew Waterman
parent 380c10f7bd
commit dbc8f4b30b
4 changed files with 9 additions and 5 deletions
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4
src/main/scala/rocket/DCache.scala
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@ -505,6 +505,6 @@ class DCacheModule(outer: DCache) extends HellaCacheModule(outer) {
}
// performance events
io.cpu.acquire := edge.last(tl_out.a)
io.cpu.release := edge.last(tl_out.c)
io.cpu.acquire := edge.done(tl_out.a)
io.cpu.release := edge.done(tl_out.c)
}