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tilelink2: optimize the supportsX check circuits

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Wesley W. Terpstra 2017-03-14 17:37:41 -07:00
parent 3c5c877409
commit d98fd942f1
1 changed files with 30 additions and 27 deletions
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57
src/main/scala/uncore/tilelink2/Parameters.scala
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@ -118,37 +118,40 @@ case class TLManagerPortParameters(
// Does this Port manage this ID/address? // Does this Port manage this ID/address?
def containsSafe(address: UInt) = findSafe(address).reduce(_ || _) def containsSafe(address: UInt) = findSafe(address).reduce(_ || _)
private def safe_helper(member: TLManagerParameters => TransferSizes)(address: UInt, lgSize: UInt) = { private def supportHelper(
val allSame = managers.map(member(_) == member(managers(0))).reduce(_ && _) safe: Boolean,
if (allSame) containsSafe(address) && member(managers(0)).containsLg(lgSize) else { member: TLManagerParameters => TransferSizes,
Mux1H(findSafe(address), managers.map(member(_).containsLg(lgSize))) address: UInt,
} lgSize: UInt,
} range: Option[TransferSizes]): Bool = {
private def fast_helper(member: TLManagerParameters => TransferSizes)(address: UInt, lgSize: UInt) = { def trim(x: TransferSizes) = range.map(_.intersect(x)).getOrElse(x)
val allSame = managers.map(member(_) == member(managers(0))).reduce(_ && _) val supportCases = managers.groupBy(m => trim(member(m))).mapValues(_.flatMap(_.address))
if (allSame) member(managers(0)).containsLg(lgSize) else { val mask = if (safe) ~BigInt(0) else AddressDecoder(supportCases.values.toList)
Mux1H(findFast(address), managers.map(member(_).containsLg(lgSize))) val simplified = supportCases.mapValues(seq => AddressSet.unify(seq.map(_.widen(~mask)).distinct))
} simplified.map { case (s, a) =>
(Bool(Some(s) == range) || s.containsLg(lgSize)) &&
a.map(_.contains(address)).reduce(_||_)
}.foldLeft(Bool(false))(_||_)
} }
// Check for support of a given operation at a specific address // Check for support of a given operation at a specific address
val supportsAcquireTSafe = safe_helper(_.supportsAcquireT) _ def supportsAcquireTSafe (address: UInt, lgSize: UInt, range: Option[TransferSizes] = None) = supportHelper(true, _.supportsAcquireT, address, lgSize, range)
val supportsAcquireBSafe = safe_helper(_.supportsAcquireB) _ def supportsAcquireBSafe (address: UInt, lgSize: UInt, range: Option[TransferSizes] = None) = supportHelper(true, _.supportsAcquireB, address, lgSize, range)
val supportsArithmeticSafe = safe_helper(_.supportsArithmetic) _ def supportsArithmeticSafe(address: UInt, lgSize: UInt, range: Option[TransferSizes] = None) = supportHelper(true, _.supportsArithmetic, address, lgSize, range)
val supportsLogicalSafe = safe_helper(_.supportsLogical) _ def supportsLogicalSafe (address: UInt, lgSize: UInt, range: Option[TransferSizes] = None) = supportHelper(true, _.supportsLogical, address, lgSize, range)
val supportsGetSafe = safe_helper(_.supportsGet) _ def supportsGetSafe (address: UInt, lgSize: UInt, range: Option[TransferSizes] = None) = supportHelper(true, _.supportsGet, address, lgSize, range)
val supportsPutFullSafe = safe_helper(_.supportsPutFull) _ def supportsPutFullSafe (address: UInt, lgSize: UInt, range: Option[TransferSizes] = None) = supportHelper(true, _.supportsPutFull, address, lgSize, range)
val supportsPutPartialSafe = safe_helper(_.supportsPutPartial) _ def supportsPutPartialSafe(address: UInt, lgSize: UInt, range: Option[TransferSizes] = None) = supportHelper(true, _.supportsPutPartial, address, lgSize, range)
val supportsHintSafe = safe_helper(_.supportsHint) _ def supportsHintSafe (address: UInt, lgSize: UInt, range: Option[TransferSizes] = None) = supportHelper(true, _.supportsHint, address, lgSize, range)
val supportsAcquireTFast = fast_helper(_.supportsAcquireT) _ def supportsAcquireTFast (address: UInt, lgSize: UInt, range: Option[TransferSizes] = None) = supportHelper(false, _.supportsAcquireT, address, lgSize, range)
val supportsAcquireBFast = fast_helper(_.supportsAcquireB) _ def supportsAcquireBFast (address: UInt, lgSize: UInt, range: Option[TransferSizes] = None) = supportHelper(false, _.supportsAcquireB, address, lgSize, range)
val supportsArithmeticFast = fast_helper(_.supportsArithmetic) _ def supportsArithmeticFast(address: UInt, lgSize: UInt, range: Option[TransferSizes] = None) = supportHelper(false, _.supportsArithmetic, address, lgSize, range)
val supportsLogicalFast = fast_helper(_.supportsLogical) _ def supportsLogicalFast (address: UInt, lgSize: UInt, range: Option[TransferSizes] = None) = supportHelper(false, _.supportsLogical, address, lgSize, range)
val supportsGetFast = fast_helper(_.supportsGet) _ def supportsGetFast (address: UInt, lgSize: UInt, range: Option[TransferSizes] = None) = supportHelper(false, _.supportsGet, address, lgSize, range)
val supportsPutFullFast = fast_helper(_.supportsPutFull) _ def supportsPutFullFast (address: UInt, lgSize: UInt, range: Option[TransferSizes] = None) = supportHelper(false, _.supportsPutFull, address, lgSize, range)
val supportsPutPartialFast = fast_helper(_.supportsPutPartial) _ def supportsPutPartialFast(address: UInt, lgSize: UInt, range: Option[TransferSizes] = None) = supportHelper(false, _.supportsPutPartial, address, lgSize, range)
val supportsHintFast = fast_helper(_.supportsHint) _ def supportsHintFast (address: UInt, lgSize: UInt, range: Option[TransferSizes] = None) = supportHelper(false, _.supportsHint, address, lgSize, range)
} }
case class TLClientParameters( case class TLClientParameters(