riscv/rocket-chip
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nodes: grab a name on construction

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Wesley W. Terpstra
2017-09-11 23:33:44 -07:00
parent 3656e975a1
commit d89ee9d9d4
18 changed files with 121 additions and 135 deletions
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src/main/scala/tilelink/ToAXI4.scala
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@@ -10,7 +10,7 @@ import freechips.rocketchip.util._
import freechips.rocketchip.amba.axi4._
import scala.math.{min, max}
case class TLToAXI4Node(beatBytes: Int, stripBits: Int = 0) extends MixedAdapterNode(TLImp, AXI4Imp)(
case class TLToAXI4Node(beatBytes: Int, stripBits: Int = 0)(implicit valName: ValName) extends MixedAdapterNode(TLImp, AXI4Imp)(
dFn = { p =>
p.clients.foreach { c =>
require (c.sourceId.start % (1 << stripBits) == 0 &&