riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

chisel3 fix for split metadata

Browse Source
This commit is contained in:
Howard Mao 2016-03-30 22:11:19 -07:00
parent 3d990bdbef
commit d78066db5c
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
uncore/src/main/scala/cache.scala
View File

@ -158,7 +158,7 @@ class MetadataArray[T <: Metadata](onReset: () => T)(implicit p: Parameters) ext
if (hasSplitMetadata) {
val tag_arrs = List.fill(nWays){ SeqMem(nSets, UInt(width = metabits)) }
val tag_readout = Wire(Vec(nWays,rstVal.cloneType))
val tags_vec = Wire(Vec.fill(nWays)(UInt(width = metabits)))
val tags_vec = Wire(Vec(nWays, UInt(width = metabits)))
(0 until nWays).foreach { (i) =>
when (rst || (io.write.valid && wmask(i))) {
tag_arrs(i).write(waddr, wdata)