riscv/rocket-chip
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Massive update containing several months of changes from the now-defunct private chip repo.

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* Adds support for a L2 cache with directory bits for tracking L1 coherence (DefaultL2Config), and new metadata-based coherence API.
* Additional tests.
* New virtual memory implementation, priviliged architecture (1.7), custom CSRs, FDivSqrt unit
* Updated TileLink protocol, NASTI protocol SHIMs.
* Lays groundwork for multiple top-level memory channels, superscalar fetch.
* Bump all submodules.
This commit is contained in:
Henry Cook
2015-06-25 23:17:35 -07:00
parent 12d8d8c5e3
commit d3ccec1044
19 changed files with 697 additions and 398 deletions
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255
Makefrag
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@ -11,12 +11,13 @@ CXX := g++
CXXFLAGS := -O1
SBT := java -Xmx2048M -Xss8M -XX:MaxPermSize=128M -jar sbt-launch.jar
SHELL := /bin/bash
src_path = src/main/scala
chisel_srcs = $(base_dir)/$(src_path)/*.scala $(base_dir)/rocket/$(src_path)/*.scala $(base_dir)/uncore/$(src_path)/*.scala $(SRC_EXTENSION)
disasm := 2>
which_disasm := $(shell which riscv-dis)
which_disasm := $(shell which spike-dasm)
ifneq ($(which_disasm),)
disasm := 3>&1 1>&2 2>&3 | $(which_disasm) $(DISASM_EXTENSION) >
endif
@ -28,7 +29,7 @@ timeout_cycles = 100000000
#--------------------------------------------------------------------
$(generated_dir)/$(MODEL).$(CONFIG).v: $(chisel_srcs)
cd $(base_dir) && mkdir -p $(generated_dir) && $(SBT) "project rocketchip" "elaborate $(MODEL) --backend $(BACKEND) --targetDir $(generated_dir) --noInlineMem --configInstance rocketchip.$(CONFIG) --configDump"
cd $(base_dir) && mkdir -p $(generated_dir) && $(SBT) "project rocketchip" "elaborate $(MODEL) --backend $(BACKEND) --targetDir $(generated_dir) --configDump --noInlineMem --configInstance rocketchip.$(CONFIG)"
cd $(generated_dir) && \
if [ -a $(MODEL).$(CONFIG).conf ]; then \
$(mem_gen) $(generated_dir)/$(MODEL).$(CONFIG).conf >> $(generated_dir)/$(MODEL).$(CONFIG).v; \
@ -151,11 +152,123 @@ asm_p_tests = \
rv64uf-p-fadd \
rv64uf-p-fmin \
rv64uf-p-fmadd \
rv64uf-p-fdiv \
rv64uf-p-structural \
rv64si-p-coreid \
rv64si-p-csr \
rv64si-pm-ipi \
rv64si-p-wfi \
rv64si-p-illegal \
rv64si-p-ma_fetch \
rv64si-p-ma_addr \
rv64si-p-scall \
rv64si-p-sbreak \
rv64si-p-timer \
rv64ui-pm-lrsc \
rv64mi-p-csr \
rv64mi-p-mcsr \
rv64mi-p-wfi \
rv64mi-p-dirty \
rv64mi-p-illegal \
rv64mi-p-ma_addr \
rv64mi-p-ma_fetch \
rv64mi-pm-ipi \
rv64mi-p-sbreak \
rv64mi-p-scall \
rv64mi-p-timer \
asm_pt_tests = \
rv64ui-pt-add \
rv64ui-pt-addi \
rv64ui-pt-amoadd_d \
rv64ui-pt-amoadd_w \
rv64ui-pt-amoand_d \
rv64ui-pt-amoand_w \
rv64ui-pt-amoor_d \
rv64ui-pt-amoor_w \
rv64ui-pt-amoxor_d \
rv64ui-pt-amoxor_w \
rv64ui-pt-amoswap_d \
rv64ui-pt-amoswap_w \
rv64ui-pt-amomax_d \
rv64ui-pt-amomax_w \
rv64ui-pt-amomaxu_d \
rv64ui-pt-amomaxu_w \
rv64ui-pt-amomin_d \
rv64ui-pt-amomin_w \
rv64ui-pt-amominu_d \
rv64ui-pt-amominu_w \
rv64ui-pt-auipc \
rv64ui-pt-fence_i \
rv64ui-pt-sb \
rv64ui-pt-sd \
rv64ui-pt-sh \
rv64ui-pt-sw \
rv64ui-pt-addiw \
rv64ui-pt-addw \
rv64ui-pt-and \
rv64ui-pt-andi \
rv64ui-pt-beq \
rv64ui-pt-bge \
rv64ui-pt-bgeu \
rv64ui-pt-blt \
rv64ui-pt-bltu \
rv64ui-pt-bne \
rv64ui-pt-div \
rv64ui-pt-divu \
rv64ui-pt-divuw \
rv64ui-pt-divw \
rv64ui-pt-j \
rv64ui-pt-jal \
rv64ui-pt-jalr \
rv64ui-pt-lb \
rv64ui-pt-lbu \
rv64ui-pt-ld \
rv64ui-pt-lh \
rv64ui-pt-lhu \
rv64ui-pt-lui \
rv64ui-pt-lw \
rv64ui-pt-lwu \
rv64ui-pt-mul \
rv64ui-pt-mulh \
rv64ui-pt-mulhsu \
rv64ui-pt-mulhu \
rv64ui-pt-mulw \
rv64ui-pt-or \
rv64ui-pt-ori \
rv64ui-pt-rem \
rv64ui-pt-remu \
rv64ui-pt-remuw \
rv64ui-pt-remw \
rv64ui-pt-simple \
rv64ui-pt-sll \
rv64ui-pt-slli \
rv64ui-pt-slliw \
rv64ui-pt-sllw \
rv64ui-pt-slt \
rv64ui-pt-slti \
rv64ui-pt-sltiu \
rv64ui-pt-sltu \
rv64ui-pt-sra \
rv64ui-pt-srai \
rv64ui-pt-sraiw \
rv64ui-pt-sraw \
rv64ui-pt-srliw \
rv64ui-pt-srlw \
rv64ui-pt-sub \
rv64ui-pt-subw \
rv64ui-pt-xor \
rv64ui-pt-xori \
rv64uf-pt-ldst \
rv64uf-pt-move \
rv64uf-pt-fsgnj \
rv64uf-pt-fcmp \
rv64uf-pt-fcvt \
rv64uf-pt-fcvt_w \
rv64uf-pt-fclass \
rv64uf-pt-fadd \
rv64uf-pt-fmin \
rv64uf-pt-fmadd \
rv64uf-pt-fdiv \
rv64uf-pt-structural \
asm_v_tests = \
rv64ui-v-add \
@ -248,6 +361,7 @@ asm_v_tests = \
rv64uf-v-fadd \
rv64uf-v-fmin \
rv64uf-v-fmadd \
rv64uf-v-fdiv \
rv64uf-v-structural \
#--------------------------------------------------------------------
@ -264,11 +378,11 @@ bmarks = \
mm.riscv \
dhrystone.riscv \
spmv.riscv \
mt-vvadd.riscv \
mt-matmul.riscv \
#vec-vvadd.riscv \
#vec-cmplxmult.riscv \
#vec-matmul.riscv \
#mt-vvadd.riscv \
#mt-matmul.riscv \
#--------------------------------------------------------------------
# Multi-threaded Benchmark Tests
@ -276,72 +390,55 @@ bmarks = \
test_mt_bmark_dir = $(base_dir)/riscv-tools/riscv-tests/mt
mt_bmarks = \
ab_matmul.riscv \
ab_vvadd.riscv \
ad_matmul.riscv \
ad_vvadd.riscv \
ae_matmul.riscv \
ae_vvadd.riscv \
af_matmul.riscv \
af_vvadd.riscv \
ag_matmul.riscv \
ag_vvadd.riscv \
ai_matmul.riscv \
ai_vvadd.riscv \
aj_vvadd.riscv \
ak_matmul.riscv \
ak_vvadd.riscv \
al_matmul.riscv \
al_vvadd.riscv \
am_matmul.riscv \
am_vvadd.riscv \
an_matmul.riscv \
ap_matmul.riscv \
ap_vvadd.riscv \
aq_matmul.riscv \
aq_vvadd.riscv \
ar_matmul.riscv \
ar_vvadd.riscv \
as_matmul.riscv \
as_vvadd.riscv \
at_matmul.riscv \
at_vvadd.riscv \
av_matmul.riscv \
av_vvadd.riscv \
ay_matmul.riscv \
ay_vvadd.riscv \
az_matmul.riscv \
az_vvadd.riscv \
ba_matmul.riscv \
ba_vvadd.riscv \
bb_matmul.riscv \
bb_vvadd.riscv \
bc_matmul.riscv \
bc_vvadd.riscv \
be_matmul.riscv \
be_vvadd.riscv \
bf_matmul.riscv \
bf_vvadd.riscv \
bh_matmul.riscv \
bh_vvadd.riscv \
bj_matmul.riscv \
bj_vvadd.riscv \
bk_matmul.riscv \
bk_vvadd.riscv \
bm_matmul.riscv \
bm_vvadd.riscv \
bn_matmul.riscv \
bn_vvadd.riscv \
bo_matmul.riscv \
bo_vvadd.riscv \
bp_matmul.riscv \
bp_vvadd.riscv \
br_matmul.riscv \
br_vvadd.riscv \
bs_matmul.riscv \
bs_vvadd.riscv \
bt_matmul.riscv \
bt_vvadd.riscv \
vvadd0.riscv \
vvadd1.riscv \
vvadd2.riscv \
vvadd3.riscv \
vvadd4.riscv \
ad_matmul.riscv \
ae_matmul.riscv \
af_matmul.riscv \
ag_matmul.riscv \
ai_matmul.riscv \
ak_matmul.riscv \
al_matmul.riscv \
am_matmul.riscv \
an_matmul.riscv \
ap_matmul.riscv \
aq_matmul.riscv \
ar_matmul.riscv \
at_matmul.riscv \
av_matmul.riscv \
ay_matmul.riscv \
az_matmul.riscv \
bb_matmul.riscv \
bc_matmul.riscv \
bf_matmul.riscv \
bh_matmul.riscv \
bj_matmul.riscv \
bk_matmul.riscv \
bm_matmul.riscv \
bo_matmul.riscv \
br_matmul.riscv \
bs_matmul.riscv \
ce_matmul.riscv \
cf_matmul.riscv \
cg_matmul.riscv \
ci_matmul.riscv \
ck_matmul.riscv \
cl_matmul.riscv \
cm_matmul.riscv \
cs_matmul.riscv \
cv_matmul.riscv \
cy_matmul.riscv \
dc_matmul.riscv \
df_matmul.riscv \
dm_matmul.riscv \
do_matmul.riscv \
dr_matmul.riscv \
ds_matmul.riscv \
du_matmul.riscv \
dv_matmul.riscv \
#--------------------------------------------------------------------
# Build Tests
@ -353,7 +450,7 @@ mt_bmarks = \
%.riscv.hex: %
$(MAKE) -C $(dir $@) $(notdir $@)
$(addprefix $(output_dir)/, $(addsuffix .hex, $(asm_p_tests) $(asm_v_tests))): $(output_dir)/%.hex: $(tests_isa_dir)/%.hex
$(addprefix $(output_dir)/, $(addsuffix .hex, $(asm_p_tests) $(asm_pt_tests) $(asm_v_tests))): $(output_dir)/%.hex: $(tests_isa_dir)/%.hex
mkdir -p $(output_dir)
ln -fs $< $@
@ -364,3 +461,15 @@ $(addprefix $(output_dir)/, $(addsuffix .hex, $(bmarks))): $(output_dir)/%.hex:
$(addprefix $(output_dir)/, $(addsuffix .hex, $(mt_bmarks))): $(output_dir)/%.hex: $(test_mt_bmark_dir)/%.hex
mkdir -p $(output_dir)
ln -fs $< $@
$(addprefix $(output_dir)/, $(asm_p_tests) $(asm_pt_tests) $(asm_v_tests)): $(output_dir)/%: $(tests_isa_dir)/%
mkdir -p $(output_dir)
ln -fs $< $@
$(addprefix $(output_dir)/, $(bmarks)): $(output_dir)/%: $(tests_bmark_dir)/%
mkdir -p $(output_dir)
ln -fs $< $@
$(addprefix $(output_dir)/, $(mt_bmarks)): $(output_dir)/%: $(test_mt_bmark_dir)/%
mkdir -p $(output_dir)
ln -fs $< $@