riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

Streamline makefiles for more robust test dependency generation. Note: emulator/generated-src-debug no longer used

Browse Source
This commit is contained in:
Henry Cook
2015-07-28 00:23:31 -07:00
parent efd6458a3d
commit d21ffa4dba
7 changed files with 32 additions and 29 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/main/scala/Testing.scala
View File

@ -66,7 +66,7 @@ run-$kind-tests-fast: $$(addprefix $$(output_dir)/, $$(addsuffix .run, $targets)
} else { "\n" }
}
val f = createOutputFile("Makefrag-tests." + Driver.chiselConfigClassName.get)
val f = createOutputFile(s"${Driver.topComponent.name}.${Driver.chiselConfigClassName.get}.d")
f.write(List(gen("asm", asmSuites.values.toSeq), gen("bmark", bmarkSuites.values.toSeq)).mkString("\n"))
f.close
}