riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

simplify CSR decoding code

Browse Source
This commit is contained in:
Andrew Waterman 2014-10-03 14:31:01 -07:00
parent 655f9ae1af
commit cde7c9d869
1 changed files with 1 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
rocket/src/main/scala/csr.scala
View File

@ -113,10 +113,7 @@ class CSRFile extends Module
val map = for ((v, i) <- CSRs.all.zipWithIndex) val map = for ((v, i) <- CSRs.all.zipWithIndex)
yield v -> UInt(BigInt(1) << i) yield v -> UInt(BigInt(1) << i)
val out = ROM(map)(addr) val out = ROM(map)(addr)
val a = Array.fill(CSRs.all.max+1)(null.asInstanceOf[Bool]) Map((CSRs.all zip out.toBools):_*)
for (i <- 0 until CSRs.all.size)
a(CSRs.all(i)) = out(i)
a
} }
val wen = cpu_req_valid || host_pcr_req_fire && host_pcr_bits.rw val wen = cpu_req_valid || host_pcr_req_fire && host_pcr_bits.rw