riscv/rocket-chip
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reset -> _reset

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Huy Vo committed 2013-08-12 20:52:55 -07:00
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commit cc6631ae4d
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src/main/scala/RocketChip.scala
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@@ -14,7 +14,7 @@ object DummyTopLevelConstants {
val HTIF_WIDTH = 16 val HTIF_WIDTH = 16
val ENABLE_SHARING = true val ENABLE_SHARING = true
val ENABLE_CLEAN_EXCLUSIVE = true val ENABLE_CLEAN_EXCLUSIVE = true
val HAS_VEC = true val HAS_VEC = false
val HAS_FPU = true val HAS_FPU = true
val NL2_REL_XACTS = 1 val NL2_REL_XACTS = 1
val NL2_ACQ_XACTS = 8 val NL2_ACQ_XACTS = 8