riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

unittests: accept a configurable number of transactions to run

Browse Source
This commit is contained in:
Wesley W. Terpstra
2017-05-17 11:56:01 -07:00
parent f6f40b1442
commit c8ba6b2feb
16 changed files with 89 additions and 89 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/main/scala/uncore/tilelink2/Nodes.scala
View File

@ -106,7 +106,7 @@ case class TLInternalInputNode(portParams: Seq[TLClientPortParameters]) extends
/** Synthesizeable unit tests */
import unittest._
class TLInputNodeTest(timeout: Int = 500000)(implicit p: Parameters) extends UnitTest(timeout) {
class TLInputNodeTest(txns: Int = 5000, timeout: Int = 500000)(implicit p: Parameters) extends UnitTest(timeout) {
class Acceptor extends LazyModule {
val node = TLInputNode()
val tlram = LazyModule(new TLRAM(AddressSet(0x54321000, 0xfff)))
@ -119,7 +119,7 @@ class TLInputNodeTest(timeout: Int = 500000)(implicit p: Parameters) extends Uni
}
}
val fuzzer = LazyModule(new TLFuzzer(5000))
val fuzzer = LazyModule(new TLFuzzer(txns))
LazyModule(new Acceptor).node := TLFragmenter(4, 64)(fuzzer.node)
io.finished := Module(fuzzer.module).io.finished