riscv/rocket-chip
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IntNodes: moved from tilelink to their own package

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This commit is contained in:
Wesley W. Terpstra
2017-10-19 20:44:54 -07:00
parent 6bc9c9fc6c
commit c6f95570df
23 changed files with 208 additions and 130 deletions
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1
src/main/scala/rocket/BusErrorUnit.scala
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@ -11,6 +11,7 @@ import freechips.rocketchip.tile._
import freechips.rocketchip.diplomacy._
import freechips.rocketchip.regmapper._
import freechips.rocketchip.tilelink._
import freechips.rocketchip.interrupts._
trait BusErrors extends Bundle {
def toErrorList: List[Option[Valid[UInt]]]

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src/main/scala/rocket/ScratchpadSlavePort.scala
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@ -10,6 +10,7 @@ import freechips.rocketchip.coreplex.CacheBlockBytes
import freechips.rocketchip.diplomacy._
import freechips.rocketchip.tile._
import freechips.rocketchip.tilelink._
import freechips.rocketchip.interrupts._
import freechips.rocketchip.util._
class ScratchpadSlavePort(address: AddressSet, coreDataBytes: Int, usingAtomics: Boolean)(implicit p: Parameters) extends LazyModule {