Get rid of remaining MemIO code

The only thing we were still using it for was for the MIFDataBits
and MIFTagBits parameters. We replace these with EdgeDataBits and
EdgeIDBits.

src/main/scala/rocketchip/Periphery.scala

@@ -51,6 +51,10 @@ case object RTCPeriod extends Field[Int]
 case class PeripheryBusConfig(arithAMO: Boolean, beatBytes: Int = 4)
 case object PeripheryBusKey extends Field[PeripheryBusConfig]
 
+/* Specifies the data and id width at the chip boundary */
+case object EdgeDataBits extends Field[Int]
+case object EdgeIDBits extends Field[Int]
+
 object PeripheryUtils {
   def addQueueAXI(source: NastiIO) = {
     val sink = Wire(source)