Merge pull request #850 from freechipsproject/plic_undefZero
PLIC: (undefZero=true) Don't allow addresses to alias
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c28c23150d
@ -79,7 +79,7 @@ class TLPLIC(params: PLICParams)(implicit p: Parameters) extends LazyModule
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address = Seq(params.address),
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address = Seq(params.address),
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device = device,
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device = device,
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beatBytes = p(XLen)/8,
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beatBytes = p(XLen)/8,
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undefZero = false,
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undefZero = true,
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concurrency = 1) // limiting concurrency handles RAW hazards on claim registers
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concurrency = 1) // limiting concurrency handles RAW hazards on claim registers
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val intnode = IntNexusNode(
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val intnode = IntNexusNode(
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