riscv/rocket-chip
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Revert "add new parameters for new SCR file"

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This reverts commit 4dad5b8b32.

The commit breaks the build.
This commit is contained in:
Christopher Celio
2016-02-13 04:02:20 -08:00
parent 6c6bbca92a
commit c1b4d9372f
2 changed files with 0 additions and 3 deletions
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src/main/scala/RocketChip.scala
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@ -53,7 +53,6 @@ trait HasTopLevelParameters {
lazy val mifDataBeats = p(MIFDataBeats)
lazy val xLen = p(XLen)
lazy val nSCR = p(HtifKey).nSCR
lazy val nUncoreSCR = p(HtifKey).nUncoreSCR
lazy val scrAddrBits = log2Up(nSCR)
lazy val scrDataBits = 64
lazy val scrDataBytes = scrDataBits / 8