riscv/rocket-chip
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If +stats is set when running simv-debug, will only output vcd data when cr28 is high.

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Stephen Twigg 2013-07-30 16:39:47 -07:00
parent 4d916b56e3
commit c1b1a21a0f
1 changed files with 1 additions and 1 deletions
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riscv-rocket

@ -1 +1 @@
Subproject commit 525a41f6f93bf9906c99c04dacaf75fa97723e57
Subproject commit 3aa1971c855f3562f2d71cf824ecbb8ae41867fd