riscv/rocket-chip
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upgrade to new rocket/vu memory interface, fix amo nack bug in hellacache

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This commit is contained in:
Yunsup Lee
2012-02-26 23:46:51 -08:00
parent 6e706c7c74
commit bfd0ae125e
5 changed files with 25 additions and 18 deletions
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4
rocket/src/main/scala/ptw.scala
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@ -55,8 +55,10 @@ class rocketDmemArbiter(n: Int) extends Component
for (i <- 0 until n)
{
val tag_hit = io.dmem.resp_tag(log2up(n)-1,0) === UFix(i)
io.requestor(i).resp_miss := io.dmem.resp_miss && tag_hit
io.requestor(i).xcpt_ma_ld := io.dmem.xcpt_ma_ld && Reg(io.requestor(i).req_val)
io.requestor(i).xcpt_ma_st := io.dmem.xcpt_ma_st && Reg(io.requestor(i).req_val)
io.requestor(i).resp_nack := io.dmem.resp_nack && Reg(io.requestor(i).req_val)
io.requestor(i).resp_miss := io.dmem.resp_miss && tag_hit
io.requestor(i).resp_val := io.dmem.resp_val && tag_hit
io.requestor(i).resp_replay := io.dmem.resp_replay && tag_hit
io.requestor(i).resp_data := io.dmem.resp_data