riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

TLROM: allow name and compatibility strings to be provided by subclasses.

Browse Source
This commit is contained in:
Megan Wachs 2017-03-16 16:06:30 -07:00
parent 8e6beb80be
commit bf648514e3
1 changed files with 3 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
src/main/scala/uncore/devices/Rom.scala
View File

@ -12,9 +12,10 @@ import uncore.tilelink2._
import uncore.util._ import uncore.util._
import config._ import config._
class TLROM(val base: BigInt, val size: Int, contentsDelayed: => Seq[Byte], executable: Boolean = true, beatBytes: Int = 4)(implicit p: Parameters) extends LazyModule class TLROM(val base: BigInt, val size: Int, contentsDelayed: => Seq[Byte], executable: Boolean = true,
beatBytes: Int = 4, name: String = "rom", devcompat: Seq[String] = Nil)(implicit p: Parameters) extends LazyModule
{ {
val device = new SimpleDevice("rom", Nil) val device = new SimpleDevice(name, devcompat)
val node = TLManagerNode(beatBytes, TLManagerParameters( val node = TLManagerNode(beatBytes, TLManagerParameters(
address = List(AddressSet(base, size-1)), address = List(AddressSet(base, size-1)),