riscv/rocket-chip
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remove host.start signal, use reset instead

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This commit is contained in:
Andrew Waterman
2012-01-11 17:49:32 -08:00
parent 92dda102b6
commit bcb55e581a
3 changed files with 2 additions and 5 deletions
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2
rocket/src/main/scala/cpu.scala
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@ -11,7 +11,6 @@ class ioDebug(view: List[String] = null) extends Bundle(view)
class ioHost(view: List[String] = null) extends Bundle(view)
{
val start = Bool('input);
val from_wen = Bool('input);
val from = Bits(64, 'input);
val to = Bits(64, 'output);
@ -47,7 +46,6 @@ class rocketProc extends Component
ctrl.io.dpath <> dpath.io.ctrl;
dpath.io.host ^^ io.host;
ctrl.io.host.start := io.host.start;
dpath.io.debug ^^ io.debug;
// FIXME: try to make this more compact