use definitions in consts header whenever possible
This commit is contained in:
parent
fb501e75c0
commit
bbf14ddc01
22
Makefrag
22
Makefrag
@ -44,3 +44,25 @@ $(sim_dir)/libdramsim.a: $(DRAMSIM_OBJS)
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%.riscv.hex: %
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%.riscv.hex: %
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$(MAKE) -C $(dir $@) $(notdir $@)
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$(MAKE) -C $(dir $@) $(notdir $@)
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#---------------------------------------------------------------------
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# Constants Header Files
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#---------------------------------------------------------------------
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params_file = $(generated_dir)/$(MODEL).$(CONFIG).prm
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consts_header = $(generated_dir)/consts.$(CONFIG).h
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$(consts_header): $(params_file)
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echo "#ifndef __CONST_H__" > $@
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echo "#define __CONST_H__" >> $@
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sed -r 's/\(([A-Za-z0-9_]+),([A-Za-z0-9_]+)\)/#define \1 \2/' $< >> $@
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echo "#define TBFRAG \"$(MODEL).$(CONFIG).tb.cpp\"" >> $@
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echo "#endif // __CONST_H__" >> $@
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params_file_debug = $(generated_dir_debug)/$(MODEL).$(CONFIG).prm
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consts_header_debug = $(generated_dir_debug)/consts.$(CONFIG).h
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$(consts_header_debug): $(params_file_debug)
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echo "#ifndef __CONST_H__" > $@
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echo "#define __CONST_H__" >> $@
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sed -r 's/\(([A-Za-z0-9_]+),([A-Za-z0-9_]+)\)/#define \1 \2/' $< >> $@
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echo "#define TBFRAG \"$(MODEL).$(CONFIG).tb.cpp\"" >> $@
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echo "#endif // __CONST_H__" >> $@
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@ -80,7 +80,7 @@ int main(int argc, char** argv)
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for (int i = 0; i < N_MEM_CHANNELS; i++) {
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for (int i = 0; i < N_MEM_CHANNELS; i++) {
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mm[i] = dramsim2 ? (mm_t*)(new mm_dramsim2_t) : (mm_t*)(new mm_magic_t);
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mm[i] = dramsim2 ? (mm_t*)(new mm_dramsim2_t) : (mm_t*)(new mm_magic_t);
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try {
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try {
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mm[i]->init(memsz_mb*1024*1024 / N_MEM_CHANNELS, mem_width, LINE_SIZE);
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mm[i]->init(memsz_mb*1024*1024 / N_MEM_CHANNELS, mem_width, CACHE_BLOCK_BYTES);
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} catch (const std::bad_alloc& e) {
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} catch (const std::bad_alloc& e) {
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fprintf(stderr,
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fprintf(stderr,
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"Failed to allocate %ld bytes (%ld MiB) of memory\n"
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"Failed to allocate %ld bytes (%ld MiB) of memory\n"
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@ -94,7 +94,7 @@ int main(int argc, char** argv)
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void *mems[N_MEM_CHANNELS];
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void *mems[N_MEM_CHANNELS];
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for (int i = 0; i < N_MEM_CHANNELS; i++)
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for (int i = 0; i < N_MEM_CHANNELS; i++)
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mems[i] = mm[i]->get_data();
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mems[i] = mm[i]->get_data();
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load_mem(mems, loadmem, N_MEM_CHANNELS);
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load_mem(mems, loadmem, CACHE_BLOCK_BYTES, N_MEM_CHANNELS);
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}
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}
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// Instantiate HTIF
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// Instantiate HTIF
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@ -117,7 +117,7 @@ void mm_magic_t::tick(
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cycle++;
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cycle++;
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}
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}
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void load_mem(void** mems, const char* fn, int nchannels)
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void load_mem(void** mems, const char* fn, int line_size, int nchannels)
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{
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{
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char* m;
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char* m;
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ssize_t start = 0;
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ssize_t start = 0;
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@ -135,9 +135,9 @@ void load_mem(void** mems, const char* fn, int nchannels)
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for (ssize_t i = line.length()-2, j = 0; i >= 0; i -= 2, j++) {
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for (ssize_t i = line.length()-2, j = 0; i >= 0; i -= 2, j++) {
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char data = (parse_nibble(line[i]) << 4) | parse_nibble(line[i+1]);
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char data = (parse_nibble(line[i]) << 4) | parse_nibble(line[i+1]);
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ssize_t addr = start + j;
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ssize_t addr = start + j;
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int channel = (addr / LINE_SIZE) % nchannels;
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int channel = (addr / line_size) % nchannels;
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m = (char *) mems[channel];
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m = (char *) mems[channel];
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addr = (addr / LINE_SIZE / nchannels) * LINE_SIZE + (addr % LINE_SIZE);
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addr = (addr / line_size / nchannels) * line_size + (addr % line_size);
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m[addr] = data;
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m[addr] = data;
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}
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}
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start += line.length()/2;
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start += line.length()/2;
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@ -7,9 +7,6 @@
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#include <cstring>
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#include <cstring>
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#include <queue>
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#include <queue>
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const int LINE_SIZE = 64; // all cores assume this.
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const size_t MEM_SIZE = 1L * 1024*1024*1024;
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void write_masked_data(
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void write_masked_data(
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uint8_t *base, uint8_t *data, uint64_t strb, uint64_t size);
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uint8_t *base, uint8_t *data, uint64_t strb, uint64_t size);
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@ -148,5 +145,5 @@ class mm_magic_t : public mm_t
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uint64_t cycle;
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uint64_t cycle;
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};
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};
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void load_mem(void** mems, const char* fn, int channel);
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void load_mem(void** mems, const char* fn, int line_size, int nchannels);
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#endif
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#endif
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@ -15,9 +15,8 @@ extern "C" {
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extern int vcs_main(int argc, char** argv);
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extern int vcs_main(int argc, char** argv);
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static htif_emulator_t* htif;
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static htif_emulator_t* htif;
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static unsigned htif_bytes;
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static unsigned htif_bytes = HTIF_WIDTH / 8;
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static unsigned mem_channels;
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static mm_t* mm[N_MEM_CHANNELS];
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static mm_t** mm;
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static const char* loadmem;
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static const char* loadmem;
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static bool dramsim = false;
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static bool dramsim = false;
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@ -43,6 +42,18 @@ int main(int argc, char** argv)
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htif = new htif_emulator_t(memsz_mb,
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htif = new htif_emulator_t(memsz_mb,
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std::vector<std::string>(argv + 1, argv + argc));
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std::vector<std::string>(argv + 1, argv + argc));
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for (int i=0; i<N_MEM_CHANNELS; i++) {
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mm[i] = dramsim ? (mm_t*)(new mm_dramsim2_t) : (mm_t*)(new mm_magic_t);
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mm[i]->init(MEM_SIZE / N_MEM_CHANNELS, MEM_DATA_BITS / 8, CACHE_BLOCK_BYTES);
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}
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if (loadmem) {
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void *mems[N_MEM_CHANNELS];
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for (int i = 0; i < N_MEM_CHANNELS; i++)
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mems[i] = mm[i]->get_data();
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load_mem(mems, loadmem, CACHE_BLOCK_BYTES, N_MEM_CHANNELS);
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}
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vcs_main(argc, argv);
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vcs_main(argc, argv);
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abort(); // should never get here
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abort(); // should never get here
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}
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}
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@ -83,7 +94,7 @@ void memory_tick(
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vc_handle b_id)
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vc_handle b_id)
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{
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{
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int c = vc_4stVectorRef(channel)->d;
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int c = vc_4stVectorRef(channel)->d;
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assert(c < mem_channels);
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assert(c < N_MEM_CHANNELS);
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mm_t* mmc = mm[c];
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mm_t* mmc = mm[c];
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uint32_t write_data[mmc->get_word_size()/sizeof(uint32_t)];
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uint32_t write_data[mmc->get_word_size()/sizeof(uint32_t)];
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@ -146,34 +157,6 @@ void memory_tick(
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vc_put4stVector(r_data, d);
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vc_put4stVector(r_data, d);
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}
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}
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void htif_init(
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vc_handle n_mem_channel,
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vc_handle htif_width, vc_handle mem_width)
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{
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mem_channels = vc_4stVectorRef(n_mem_channel)->d;
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int mw = vc_4stVectorRef(mem_width)->d;
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assert(mw && (mw & (mw-1)) == 0);
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mm = new mm_t*[mem_channels];
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for (int i=0; i<mem_channels; i++) {
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mm[i] = dramsim ? (mm_t*)(new mm_dramsim2_t) : (mm_t*)(new mm_magic_t);
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mm[i]->init(MEM_SIZE / mem_channels, mw/8, LINE_SIZE);
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}
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if (loadmem) {
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void *mems[mem_channels];
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for (int i = 0; i < mem_channels; i++)
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mems[i] = mm[i]->get_data();
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load_mem(mems, loadmem, mem_channels);
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}
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vec32* w = vc_4stVectorRef(htif_width);
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assert(w->d <= 32 && w->d % 8 == 0); // htif_tick assumes data fits in a vec32
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htif_bytes = w->d/8;
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}
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void htif_tick
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void htif_tick
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(
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(
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vc_handle htif_in_valid,
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vc_handle htif_in_valid,
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@ -18,6 +18,9 @@ LDFLAGS := $(LDFLAGS) -L$(RISCV)/lib -Wl,-rpath,$(RISCV)/lib -L. -ldramsim -lfes
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OBJS := $(addsuffix .o,$(CXXSRCS) $(MODEL).$(CONFIG))
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OBJS := $(addsuffix .o,$(CXXSRCS) $(MODEL).$(CONFIG))
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DEBUG_OBJS := $(addsuffix .debug.o,$(CXXSRCS) $(MODEL).$(CONFIG))
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DEBUG_OBJS := $(addsuffix .debug.o,$(CXXSRCS) $(MODEL).$(CONFIG))
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model_header = $(generated_dir)/$(MODEL).$(CONFIG).h
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model_header_debug = $(generated_dir_debug)/$(MODEL).$(CONFIG).h
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$(MODEL).$(CONFIG).o: %.o: $(generated_dir)/%.h
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$(MODEL).$(CONFIG).o: %.o: $(generated_dir)/%.h
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$(MAKE) -j $(patsubst %.cpp,%.o,$(shell ls $(generated_dir)/$(MODEL).$(CONFIG)-*.cpp))
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$(MAKE) -j $(patsubst %.cpp,%.o,$(shell ls $(generated_dir)/$(MODEL).$(CONFIG)-*.cpp))
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$(LD) -r $(patsubst %.cpp,%.o,$(shell ls $(generated_dir)/$(MODEL).$(CONFIG)-*.cpp)) -o $@
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$(LD) -r $(patsubst %.cpp,%.o,$(shell ls $(generated_dir)/$(MODEL).$(CONFIG)-*.cpp)) -o $@
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@ -32,38 +35,24 @@ $(generated_dir)/%.o: $(generated_dir)/%.cpp $(generated_dir)/%.h
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$(generated_dir_debug)/%.o: $(generated_dir_debug)/%.cpp $(generated_dir_debug)/%.h
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$(generated_dir_debug)/%.o: $(generated_dir_debug)/%.cpp $(generated_dir_debug)/%.h
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$(CXX) $(CXXFLAGS) -I$(generated_dir_debug) -c -o $@ $<
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$(CXX) $(CXXFLAGS) -I$(generated_dir_debug) -c -o $@ $<
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$(addsuffix .o,$(CXXSRCS)): %.o: $(base_dir)/csrc/%.cc $(base_dir)/csrc/*.h $(generated_dir)/$(MODEL).$(CONFIG).h $(generated_dir)/consts.$(CONFIG).h
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$(addsuffix .o,$(CXXSRCS)): %.o: $(base_dir)/csrc/%.cc $(base_dir)/csrc/*.h $(model_header) $(consts_header)
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$(CXX) $(CXXFLAGS) -include $(generated_dir)/$(MODEL).$(CONFIG).h -include $(generated_dir)/consts.$(CONFIG).h -I$(generated_dir) -c -o $@ $<
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$(CXX) $(CXXFLAGS) -include $(model_header) -include $(consts_header) -I$(generated_dir) -c -o $@ $<
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$(addsuffix .debug.o,$(CXXSRCS)): %.debug.o: $(base_dir)/csrc/%.cc $(base_dir)/csrc/*.h $(generated_dir_debug)/$(MODEL).$(CONFIG).h $(generated_dir_debug)/consts.$(CONFIG).h
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$(addsuffix .debug.o,$(CXXSRCS)): %.debug.o: $(base_dir)/csrc/%.cc $(base_dir)/csrc/*.h $(model_header_debug) $(consts_header_debug)
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$(CXX) $(CXXFLAGS) -include $(generated_dir_debug)/$(MODEL).$(CONFIG).h -include $(generated_dir_debug)/consts.$(CONFIG).h -I$(generated_dir_debug) -c -o $@ $<
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$(CXX) $(CXXFLAGS) -include $(model_header_debug) -include $(consts_header_debug) -I$(generated_dir_debug) -c -o $@ $<
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$(generated_dir)/$(MODEL).$(CONFIG).d $(generated_dir)/$(MODEL).$(CONFIG).h : $(chisel_srcs)
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$(generated_dir)/$(MODEL).$(CONFIG).d $(model_header) $(params_file): $(chisel_srcs)
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cd $(base_dir) && $(SBT) "project $(PROJECT)" "run $(CHISEL_ARGS) --noIoDebug"
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cd $(base_dir) && $(SBT) "project $(PROJECT)" "run $(CHISEL_ARGS) --noIoDebug"
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$(generated_dir_debug)/$(MODEL).$(CONFIG).h : $(chisel_srcs)
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$(model_header_debug) $(params_file_debug): $(chisel_srcs)
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cd $(base_dir) && $(SBT) "project $(PROJECT)" "run $(CHISEL_ARGS)-debug --debug --vcd --ioDebug"
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cd $(base_dir) && $(SBT) "project $(PROJECT)" "run $(CHISEL_ARGS)-debug --debug --vcd --ioDebug"
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$(generated_dir)/consts.$(CONFIG).h: $(generated_dir)/$(MODEL).$(CONFIG).h
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echo "#ifndef __CONST_H__" > $@
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echo "#define __CONST_H__" >> $@
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sed -r 's/\(([A-Za-z0-9_]+),([A-Za-z0-9_]+)\)/#define \1 \2/' $(patsubst %.h,%.prm,$<) >> $@
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echo "#define TBFRAG \"$(MODEL).$(CONFIG).tb.cpp\"" >> $@
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echo "#endif // __CONST_H__" >> $@
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$(generated_dir_debug)/consts.$(CONFIG).h: $(generated_dir_debug)/$(MODEL).$(CONFIG).h
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echo "#ifndef __CONST_H__" > $@
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echo "#define __CONST_H__" >> $@
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sed -r 's/\(([A-Za-z0-9_]+),([A-Za-z0-9_]+)\)/#define \1 \2/' $(patsubst %.h,%.prm,$<) >> $@
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echo "#define TBFRAG \"$(MODEL).$(CONFIG).tb.cpp\"" >> $@
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echo "#endif // __CONST_H__" >> $@
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emu = emulator-$(MODEL)-$(CONFIG)
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emu = emulator-$(MODEL)-$(CONFIG)
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$(emu): $(generated_dir)/$(MODEL).$(CONFIG).h $(OBJS) libdramsim.a
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$(emu): $(model_header) $(OBJS) libdramsim.a
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$(CXX) $(CXXFLAGS) -o $@ $(OBJS) $(LDFLAGS)
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$(CXX) $(CXXFLAGS) -o $@ $(OBJS) $(LDFLAGS)
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emu_debug = emulator-$(MODEL)-$(CONFIG)-debug
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emu_debug = emulator-$(MODEL)-$(CONFIG)-debug
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$(emu_debug): $(generated_dir)/$(MODEL).$(CONFIG).d $(generated_dir_debug)/$(MODEL).$(CONFIG).h $(DEBUG_OBJS) libdramsim.a
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$(emu_debug): $(generated_dir)/$(MODEL).$(CONFIG).d $(model_header_debug) $(DEBUG_OBJS) libdramsim.a
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$(CXX) $(CXXFLAGS) -o $@ $(DEBUG_OBJS) $(LDFLAGS)
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$(CXX) $(CXXFLAGS) -o $@ $(DEBUG_OBJS) $(LDFLAGS)
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all: $(emu)
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all: $(emu)
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@ -40,6 +40,7 @@ VCS_OPTS = -notice -line +lint=all,noVCDE,noONGS,noUI -error=PCWM-L -timescale=1
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-CC "-I$(realpath $(base_dir))/dramsim2" \
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-CC "-I$(realpath $(base_dir))/dramsim2" \
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-CC "-std=c++11" \
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-CC "-std=c++11" \
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-CC "-Wl,-rpath,$(RISCV)/lib" \
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-CC "-Wl,-rpath,$(RISCV)/lib" \
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-CC "-include $(consts_header)" \
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-e vcs_main \
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-e vcs_main \
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$(RISCV)/lib/libfesvr.so \
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$(RISCV)/lib/libfesvr.so \
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$(sim_dir)/libdramsim.a \
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$(sim_dir)/libdramsim.a \
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@ -54,14 +55,16 @@ VCS_OPTS = -notice -line +lint=all,noVCDE,noONGS,noUI -error=PCWM-L -timescale=1
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#--------------------------------------------------------------------
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#--------------------------------------------------------------------
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simv = $(sim_dir)/simv-$(MODEL)-$(CONFIG)
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simv = $(sim_dir)/simv-$(MODEL)-$(CONFIG)
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$(simv) : $(sim_vsrcs) $(sim_csrcs) $(sim_dir)/libdramsim.a
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$(simv) : $(sim_vsrcs) $(sim_csrcs) $(sim_dir)/libdramsim.a $(consts_header)
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cd $(sim_dir) && \
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cd $(sim_dir) && \
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rm -rf csrc && \
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$(VCS) $(VCS_OPTS) -o $(simv) \
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$(VCS) $(VCS_OPTS) -o $(simv) \
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-debug_pp \
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-debug_pp \
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simv_debug = $(sim_dir)/simv-$(MODEL)-$(CONFIG)-debug
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simv_debug = $(sim_dir)/simv-$(MODEL)-$(CONFIG)-debug
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$(simv_debug) : $(sim_vsrcs) $(sim_csrcs) $(sim_dir)/libdramsim.a
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$(simv_debug) : $(sim_vsrcs) $(sim_csrcs) $(sim_dir)/libdramsim.a $(consts_header)
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cd $(sim_dir) && \
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cd $(sim_dir) && \
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rm -rf csrc && \
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$(VCS) $(VCS_OPTS) -o $(simv_debug) \
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$(VCS) $(VCS_OPTS) -o $(simv_debug) \
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+define+DEBUG -debug_pp \
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+define+DEBUG -debug_pp \
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@ -159,7 +159,7 @@ class DefaultConfig extends Config (
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case CacheBlockBytes => Dump("CACHE_BLOCK_BYTES", 64)
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case CacheBlockBytes => Dump("CACHE_BLOCK_BYTES", 64)
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case CacheBlockOffsetBits => log2Up(here(CacheBlockBytes))
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case CacheBlockOffsetBits => log2Up(here(CacheBlockBytes))
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case UseBackupMemoryPort => true
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case UseBackupMemoryPort => true
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case MMIOBase => BigInt(1 << 30) // 1 GB
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case MMIOBase => Dump("MEM_SIZE", BigInt(1 << 30)) // 1 GB
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case ExternalIOStart => 2 * site(MMIOBase)
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case ExternalIOStart => 2 * site(MMIOBase)
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case GlobalAddrMap => AddrMap(
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case GlobalAddrMap => AddrMap(
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AddrMapEntry("mem", None, MemChannels(site(MMIOBase), site(NMemoryChannels), AddrMapConsts.RWX)),
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AddrMapEntry("mem", None, MemChannels(site(MMIOBase), site(NMemoryChannels), AddrMapConsts.RWX)),
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@ -39,6 +39,7 @@ VCS_OPTS = -notice -line +lint=all,noVCDE,noONGS,noUI -error=PCWM-L -timescale=1
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|||||||
-CC "-I$(realpath $(base_dir))/dramsim2" \
|
-CC "-I$(realpath $(base_dir))/dramsim2" \
|
||||||
-CC "-std=c++11" \
|
-CC "-std=c++11" \
|
||||||
-CC "-Wl,-rpath,$(RISCV)/lib" \
|
-CC "-Wl,-rpath,$(RISCV)/lib" \
|
||||||
|
-CC "-include $(consts_header)" \
|
||||||
-e vcs_main \
|
-e vcs_main \
|
||||||
$(RISCV)/lib/libfesvr.so \
|
$(RISCV)/lib/libfesvr.so \
|
||||||
$(sim_dir)/libdramsim.a \
|
$(sim_dir)/libdramsim.a \
|
||||||
@ -52,14 +53,16 @@ VCS_OPTS = -notice -line +lint=all,noVCDE,noONGS,noUI -error=PCWM-L -timescale=1
|
|||||||
#--------------------------------------------------------------------
|
#--------------------------------------------------------------------
|
||||||
|
|
||||||
simv = $(sim_dir)/simv-$(MODEL)-$(CONFIG)
|
simv = $(sim_dir)/simv-$(MODEL)-$(CONFIG)
|
||||||
$(simv) : $(sim_vsrcs) $(sim_csrcs) $(sim_dir)/libdramsim.a
|
$(simv) : $(sim_vsrcs) $(sim_csrcs) $(sim_dir)/libdramsim.a $(consts_header)
|
||||||
cd $(sim_dir) && \
|
cd $(sim_dir) && \
|
||||||
|
rm -rf csrc && \
|
||||||
$(VCS) $(VCS_OPTS) -o $(simv) \
|
$(VCS) $(VCS_OPTS) -o $(simv) \
|
||||||
-debug_pp \
|
-debug_pp \
|
||||||
|
|
||||||
simv_debug = $(sim_dir)/simv-$(MODEL)-$(CONFIG)-debug
|
simv_debug = $(sim_dir)/simv-$(MODEL)-$(CONFIG)-debug
|
||||||
$(simv_debug) : $(sim_vsrcs) $(sim_csrcs) $(sim_dir)/libdramsim.a
|
$(simv_debug) : $(sim_vsrcs) $(sim_csrcs) $(sim_dir)/libdramsim.a $(consts_header)
|
||||||
cd $(sim_dir) && \
|
cd $(sim_dir) && \
|
||||||
|
rm -rf csrc && \
|
||||||
$(VCS) $(VCS_OPTS) -o $(simv_debug) \
|
$(VCS) $(VCS_OPTS) -o $(simv_debug) \
|
||||||
+define+DEBUG -debug_pp \
|
+define+DEBUG -debug_pp \
|
||||||
|
|
||||||
|
@ -1,12 +1,5 @@
|
|||||||
// See LICENSE for license details.
|
// See LICENSE for license details.
|
||||||
|
|
||||||
extern "A" void htif_init
|
|
||||||
(
|
|
||||||
input reg [31:0] n_mem_channel,
|
|
||||||
input reg [31:0] htif_width,
|
|
||||||
input reg [31:0] mem_width
|
|
||||||
);
|
|
||||||
|
|
||||||
extern "A" void htif_fini(input reg failure);
|
extern "A" void htif_fini(input reg failure);
|
||||||
|
|
||||||
extern "A" void htif_tick
|
extern "A" void htif_tick
|
||||||
@ -241,7 +234,6 @@ module rocketTestHarness;
|
|||||||
$readmemh(loadmem, mem.ram);
|
$readmemh(loadmem, mem.ram);
|
||||||
`endif
|
`endif
|
||||||
verbose = $test$plusargs("verbose");
|
verbose = $test$plusargs("verbose");
|
||||||
htif_init(n_mem_channel, htif_width, mem_width);
|
|
||||||
`ifdef DEBUG
|
`ifdef DEBUG
|
||||||
stats_active = $test$plusargs("stats");
|
stats_active = $test$plusargs("stats");
|
||||||
if ($value$plusargs("vcdplusfile=%s", vcdplusfile))
|
if ($value$plusargs("vcdplusfile=%s", vcdplusfile))
|
||||||
|
Loading…
Reference in New Issue
Block a user