diff --git a/Makefrag b/Makefrag
index 57fb8465..cb3f6b3d 100644
--- a/Makefrag
+++ b/Makefrag
@@ -44,3 +44,25 @@ $(sim_dir)/libdramsim.a: $(DRAMSIM_OBJS)
 
 %.riscv.hex: %
 	$(MAKE) -C $(dir $@) $(notdir $@)
+
+#---------------------------------------------------------------------
+# Constants Header Files
+#---------------------------------------------------------------------
+
+params_file = $(generated_dir)/$(MODEL).$(CONFIG).prm
+consts_header = $(generated_dir)/consts.$(CONFIG).h
+$(consts_header): $(params_file)
+	echo "#ifndef __CONST_H__" > $@
+	echo "#define __CONST_H__" >> $@
+	sed -r 's/\(([A-Za-z0-9_]+),([A-Za-z0-9_]+)\)/#define \1 \2/' $< >> $@
+	echo "#define TBFRAG \"$(MODEL).$(CONFIG).tb.cpp\"" >> $@
+	echo "#endif // __CONST_H__" >> $@
+
+params_file_debug = $(generated_dir_debug)/$(MODEL).$(CONFIG).prm
+consts_header_debug = $(generated_dir_debug)/consts.$(CONFIG).h
+$(consts_header_debug): $(params_file_debug)
+	echo "#ifndef __CONST_H__" > $@
+	echo "#define __CONST_H__" >> $@
+	sed -r 's/\(([A-Za-z0-9_]+),([A-Za-z0-9_]+)\)/#define \1 \2/' $< >> $@
+	echo "#define TBFRAG \"$(MODEL).$(CONFIG).tb.cpp\"" >> $@
+	echo "#endif // __CONST_H__" >> $@
diff --git a/csrc/emulator.cc b/csrc/emulator.cc
index 9efac16e..0e61fed5 100644
--- a/csrc/emulator.cc
+++ b/csrc/emulator.cc
@@ -80,7 +80,7 @@ int main(int argc, char** argv)
   for (int i = 0; i < N_MEM_CHANNELS; i++) {
     mm[i] = dramsim2 ? (mm_t*)(new mm_dramsim2_t) : (mm_t*)(new mm_magic_t);
     try {
-      mm[i]->init(memsz_mb*1024*1024 / N_MEM_CHANNELS, mem_width, LINE_SIZE);
+      mm[i]->init(memsz_mb*1024*1024 / N_MEM_CHANNELS, mem_width, CACHE_BLOCK_BYTES);
     } catch (const std::bad_alloc& e) {
       fprintf(stderr,
           "Failed to allocate %ld bytes (%ld MiB) of memory\n"
@@ -94,7 +94,7 @@ int main(int argc, char** argv)
     void *mems[N_MEM_CHANNELS];
     for (int i = 0; i < N_MEM_CHANNELS; i++)
       mems[i] = mm[i]->get_data();
-    load_mem(mems, loadmem, N_MEM_CHANNELS);
+    load_mem(mems, loadmem, CACHE_BLOCK_BYTES, N_MEM_CHANNELS);
   }
 
   // Instantiate HTIF
diff --git a/csrc/mm.cc b/csrc/mm.cc
index e5a61ffb..c1344046 100644
--- a/csrc/mm.cc
+++ b/csrc/mm.cc
@@ -117,7 +117,7 @@ void mm_magic_t::tick(
   cycle++;
 }
 
-void load_mem(void** mems, const char* fn, int nchannels)
+void load_mem(void** mems, const char* fn, int line_size, int nchannels)
 {
   char* m;
   ssize_t start = 0;
@@ -135,9 +135,9 @@ void load_mem(void** mems, const char* fn, int nchannels)
     for (ssize_t i = line.length()-2, j = 0; i >= 0; i -= 2, j++) {
       char data = (parse_nibble(line[i]) << 4) | parse_nibble(line[i+1]);
       ssize_t addr = start + j;
-      int channel = (addr / LINE_SIZE) % nchannels;
+      int channel = (addr / line_size) % nchannels;
       m = (char *) mems[channel];
-      addr = (addr / LINE_SIZE / nchannels) * LINE_SIZE + (addr % LINE_SIZE);
+      addr = (addr / line_size / nchannels) * line_size + (addr % line_size);
       m[addr] = data;
     }
     start += line.length()/2;
diff --git a/csrc/mm.h b/csrc/mm.h
index d7b080e6..c57ebd4d 100644
--- a/csrc/mm.h
+++ b/csrc/mm.h
@@ -7,9 +7,6 @@
 #include <cstring>
 #include <queue>
 
-const int LINE_SIZE = 64; // all cores assume this.
-const size_t MEM_SIZE = 1L * 1024*1024*1024;
-
 void write_masked_data(
     uint8_t *base, uint8_t *data, uint64_t strb, uint64_t size);
 
@@ -148,5 +145,5 @@ class mm_magic_t : public mm_t
   uint64_t cycle;
 };
 
-void load_mem(void** mems, const char* fn, int channel);
+void load_mem(void** mems, const char* fn, int line_size, int nchannels);
 #endif
diff --git a/csrc/vcs_main.cc b/csrc/vcs_main.cc
index 3f8ce355..85ca3f02 100644
--- a/csrc/vcs_main.cc
+++ b/csrc/vcs_main.cc
@@ -15,9 +15,8 @@ extern "C" {
 extern int vcs_main(int argc, char** argv);
 
 static htif_emulator_t* htif;
-static unsigned htif_bytes;
-static unsigned mem_channels;
-static mm_t** mm;
+static unsigned htif_bytes = HTIF_WIDTH / 8;
+static mm_t* mm[N_MEM_CHANNELS];
 static const char* loadmem;
 static bool dramsim = false;
 
@@ -43,6 +42,18 @@ int main(int argc, char** argv)
   htif = new htif_emulator_t(memsz_mb,
           std::vector<std::string>(argv + 1, argv + argc));
 
+  for (int i=0; i<N_MEM_CHANNELS; i++) {
+    mm[i] = dramsim ? (mm_t*)(new mm_dramsim2_t) : (mm_t*)(new mm_magic_t);
+    mm[i]->init(MEM_SIZE / N_MEM_CHANNELS, MEM_DATA_BITS / 8, CACHE_BLOCK_BYTES);
+  }
+
+  if (loadmem) {
+    void *mems[N_MEM_CHANNELS];
+    for (int i = 0; i < N_MEM_CHANNELS; i++)
+      mems[i] = mm[i]->get_data();
+    load_mem(mems, loadmem, CACHE_BLOCK_BYTES, N_MEM_CHANNELS);
+  }
+
   vcs_main(argc, argv);
   abort(); // should never get here
 }
@@ -83,7 +94,7 @@ void memory_tick(
   vc_handle b_id)
 {
   int c = vc_4stVectorRef(channel)->d;
-  assert(c < mem_channels);
+  assert(c < N_MEM_CHANNELS);
   mm_t* mmc = mm[c];
 
   uint32_t write_data[mmc->get_word_size()/sizeof(uint32_t)];
@@ -146,34 +157,6 @@ void memory_tick(
   vc_put4stVector(r_data, d);
 }
 
-void htif_init(
-  vc_handle n_mem_channel,
-  vc_handle htif_width, vc_handle mem_width)
-{
-  mem_channels = vc_4stVectorRef(n_mem_channel)->d;
-
-  int mw = vc_4stVectorRef(mem_width)->d;
-  assert(mw && (mw & (mw-1)) == 0);
-
-  mm = new mm_t*[mem_channels];
-
-  for (int i=0; i<mem_channels; i++) {
-    mm[i] = dramsim ? (mm_t*)(new mm_dramsim2_t) : (mm_t*)(new mm_magic_t);
-    mm[i]->init(MEM_SIZE / mem_channels, mw/8, LINE_SIZE);
-  }
-
-  if (loadmem) {
-    void *mems[mem_channels];
-    for (int i = 0; i < mem_channels; i++)
-      mems[i] = mm[i]->get_data();
-    load_mem(mems, loadmem, mem_channels);
-  }
-
-  vec32* w = vc_4stVectorRef(htif_width);
-  assert(w->d <= 32 && w->d % 8 == 0); // htif_tick assumes data fits in a vec32
-  htif_bytes = w->d/8;
-}
-
 void htif_tick
 (
   vc_handle htif_in_valid,
diff --git a/emulator/Makefile b/emulator/Makefile
index 8007087d..dcc9b393 100644
--- a/emulator/Makefile
+++ b/emulator/Makefile
@@ -18,6 +18,9 @@ LDFLAGS := $(LDFLAGS) -L$(RISCV)/lib -Wl,-rpath,$(RISCV)/lib -L. -ldramsim -lfes
 OBJS := $(addsuffix .o,$(CXXSRCS) $(MODEL).$(CONFIG))
 DEBUG_OBJS := $(addsuffix .debug.o,$(CXXSRCS) $(MODEL).$(CONFIG))
 
+model_header = $(generated_dir)/$(MODEL).$(CONFIG).h
+model_header_debug = $(generated_dir_debug)/$(MODEL).$(CONFIG).h
+
 $(MODEL).$(CONFIG).o: %.o: $(generated_dir)/%.h
 	$(MAKE) -j $(patsubst %.cpp,%.o,$(shell ls $(generated_dir)/$(MODEL).$(CONFIG)-*.cpp))
 	$(LD) -r $(patsubst %.cpp,%.o,$(shell ls $(generated_dir)/$(MODEL).$(CONFIG)-*.cpp)) -o $@
@@ -32,38 +35,24 @@ $(generated_dir)/%.o: $(generated_dir)/%.cpp $(generated_dir)/%.h
 $(generated_dir_debug)/%.o: $(generated_dir_debug)/%.cpp $(generated_dir_debug)/%.h
 	$(CXX) $(CXXFLAGS) -I$(generated_dir_debug) -c -o $@ $<
 
-$(addsuffix .o,$(CXXSRCS)): %.o: $(base_dir)/csrc/%.cc $(base_dir)/csrc/*.h $(generated_dir)/$(MODEL).$(CONFIG).h $(generated_dir)/consts.$(CONFIG).h
-	$(CXX) $(CXXFLAGS) -include $(generated_dir)/$(MODEL).$(CONFIG).h -include $(generated_dir)/consts.$(CONFIG).h -I$(generated_dir) -c -o $@ $<
+$(addsuffix .o,$(CXXSRCS)): %.o: $(base_dir)/csrc/%.cc $(base_dir)/csrc/*.h $(model_header) $(consts_header)
+	$(CXX) $(CXXFLAGS) -include $(model_header) -include $(consts_header) -I$(generated_dir) -c -o $@ $<
 
-$(addsuffix .debug.o,$(CXXSRCS)): %.debug.o: $(base_dir)/csrc/%.cc $(base_dir)/csrc/*.h $(generated_dir_debug)/$(MODEL).$(CONFIG).h $(generated_dir_debug)/consts.$(CONFIG).h
-	$(CXX) $(CXXFLAGS) -include $(generated_dir_debug)/$(MODEL).$(CONFIG).h -include $(generated_dir_debug)/consts.$(CONFIG).h -I$(generated_dir_debug) -c -o $@ $<
+$(addsuffix .debug.o,$(CXXSRCS)): %.debug.o: $(base_dir)/csrc/%.cc $(base_dir)/csrc/*.h $(model_header_debug) $(consts_header_debug)
+	$(CXX) $(CXXFLAGS) -include $(model_header_debug) -include $(consts_header_debug) -I$(generated_dir_debug) -c -o $@ $<
 
-$(generated_dir)/$(MODEL).$(CONFIG).d $(generated_dir)/$(MODEL).$(CONFIG).h : $(chisel_srcs)
+$(generated_dir)/$(MODEL).$(CONFIG).d $(model_header) $(params_file): $(chisel_srcs)
 	cd $(base_dir) && $(SBT) "project $(PROJECT)" "run $(CHISEL_ARGS) --noIoDebug"
 
-$(generated_dir_debug)/$(MODEL).$(CONFIG).h : $(chisel_srcs)
+$(model_header_debug) $(params_file_debug): $(chisel_srcs)
 	cd $(base_dir) && $(SBT) "project $(PROJECT)" "run $(CHISEL_ARGS)-debug  --debug --vcd --ioDebug"
 
-$(generated_dir)/consts.$(CONFIG).h: $(generated_dir)/$(MODEL).$(CONFIG).h
-	echo "#ifndef __CONST_H__" > $@
-	echo "#define __CONST_H__" >> $@
-	sed -r 's/\(([A-Za-z0-9_]+),([A-Za-z0-9_]+)\)/#define \1 \2/' $(patsubst %.h,%.prm,$<) >> $@
-	echo "#define TBFRAG \"$(MODEL).$(CONFIG).tb.cpp\"" >> $@
-	echo "#endif // __CONST_H__" >> $@
-
-$(generated_dir_debug)/consts.$(CONFIG).h: $(generated_dir_debug)/$(MODEL).$(CONFIG).h
-	echo "#ifndef __CONST_H__" > $@
-	echo "#define __CONST_H__" >> $@
-	sed -r 's/\(([A-Za-z0-9_]+),([A-Za-z0-9_]+)\)/#define \1 \2/' $(patsubst %.h,%.prm,$<) >> $@
-	echo "#define TBFRAG \"$(MODEL).$(CONFIG).tb.cpp\"" >> $@
-	echo "#endif // __CONST_H__" >> $@
-
 emu = emulator-$(MODEL)-$(CONFIG)
-$(emu): $(generated_dir)/$(MODEL).$(CONFIG).h $(OBJS) libdramsim.a
+$(emu): $(model_header) $(OBJS) libdramsim.a
 	$(CXX) $(CXXFLAGS) -o $@ $(OBJS) $(LDFLAGS)
 
 emu_debug = emulator-$(MODEL)-$(CONFIG)-debug
-$(emu_debug): $(generated_dir)/$(MODEL).$(CONFIG).d $(generated_dir_debug)/$(MODEL).$(CONFIG).h $(DEBUG_OBJS) libdramsim.a
+$(emu_debug): $(generated_dir)/$(MODEL).$(CONFIG).d $(model_header_debug) $(DEBUG_OBJS) libdramsim.a
 	$(CXX) $(CXXFLAGS) -o $@ $(DEBUG_OBJS) $(LDFLAGS)
 
 all: $(emu)
diff --git a/fsim/Makefrag b/fsim/Makefrag
index bcbdb667..7dc1a551 100644
--- a/fsim/Makefrag
+++ b/fsim/Makefrag
@@ -40,6 +40,7 @@ VCS_OPTS = -notice -line +lint=all,noVCDE,noONGS,noUI -error=PCWM-L -timescale=1
 	-CC "-I$(realpath $(base_dir))/dramsim2" \
 	-CC "-std=c++11" \
 	-CC "-Wl,-rpath,$(RISCV)/lib" \
+        -CC "-include $(consts_header)" \
 	-e vcs_main \
 	$(RISCV)/lib/libfesvr.so \
 	$(sim_dir)/libdramsim.a \
@@ -54,14 +55,16 @@ VCS_OPTS = -notice -line +lint=all,noVCDE,noONGS,noUI -error=PCWM-L -timescale=1
 #--------------------------------------------------------------------
 
 simv = $(sim_dir)/simv-$(MODEL)-$(CONFIG)
-$(simv) : $(sim_vsrcs) $(sim_csrcs) $(sim_dir)/libdramsim.a
+$(simv) : $(sim_vsrcs) $(sim_csrcs) $(sim_dir)/libdramsim.a $(consts_header)
 	cd $(sim_dir) && \
+        rm -rf csrc && \
 	$(VCS) $(VCS_OPTS) -o $(simv) \
 	-debug_pp \
 
 simv_debug = $(sim_dir)/simv-$(MODEL)-$(CONFIG)-debug
-$(simv_debug) : $(sim_vsrcs) $(sim_csrcs) $(sim_dir)/libdramsim.a
+$(simv_debug) : $(sim_vsrcs) $(sim_csrcs) $(sim_dir)/libdramsim.a $(consts_header)
 	cd $(sim_dir) && \
+        rm -rf csrc && \
 	$(VCS) $(VCS_OPTS) -o $(simv_debug) \
 	+define+DEBUG -debug_pp \
 
diff --git a/src/main/scala/Configs.scala b/src/main/scala/Configs.scala
index bbf697a7..5e63b051 100644
--- a/src/main/scala/Configs.scala
+++ b/src/main/scala/Configs.scala
@@ -159,7 +159,7 @@ class DefaultConfig extends Config (
       case CacheBlockBytes => Dump("CACHE_BLOCK_BYTES", 64)
       case CacheBlockOffsetBits => log2Up(here(CacheBlockBytes))
       case UseBackupMemoryPort => true
-      case MMIOBase => BigInt(1 << 30) // 1 GB
+      case MMIOBase => Dump("MEM_SIZE", BigInt(1 << 30)) // 1 GB
       case ExternalIOStart => 2 * site(MMIOBase)
       case GlobalAddrMap => AddrMap(
         AddrMapEntry("mem", None, MemChannels(site(MMIOBase), site(NMemoryChannels), AddrMapConsts.RWX)),
diff --git a/vsim/Makefrag b/vsim/Makefrag
index 236e5d3e..9ab7f05f 100644
--- a/vsim/Makefrag
+++ b/vsim/Makefrag
@@ -39,6 +39,7 @@ VCS_OPTS = -notice -line +lint=all,noVCDE,noONGS,noUI -error=PCWM-L -timescale=1
 	-CC "-I$(realpath $(base_dir))/dramsim2" \
 	-CC "-std=c++11" \
 	-CC "-Wl,-rpath,$(RISCV)/lib" \
+        -CC "-include $(consts_header)" \
 	-e vcs_main \
 	$(RISCV)/lib/libfesvr.so \
 	$(sim_dir)/libdramsim.a \
@@ -52,14 +53,16 @@ VCS_OPTS = -notice -line +lint=all,noVCDE,noONGS,noUI -error=PCWM-L -timescale=1
 #--------------------------------------------------------------------
 
 simv = $(sim_dir)/simv-$(MODEL)-$(CONFIG)
-$(simv) : $(sim_vsrcs) $(sim_csrcs) $(sim_dir)/libdramsim.a
+$(simv) : $(sim_vsrcs) $(sim_csrcs) $(sim_dir)/libdramsim.a $(consts_header)
 	cd $(sim_dir) && \
+        rm -rf csrc && \
 	$(VCS) $(VCS_OPTS) -o $(simv) \
 	-debug_pp \
 
 simv_debug = $(sim_dir)/simv-$(MODEL)-$(CONFIG)-debug
-$(simv_debug) : $(sim_vsrcs) $(sim_csrcs) $(sim_dir)/libdramsim.a
+$(simv_debug) : $(sim_vsrcs) $(sim_csrcs) $(sim_dir)/libdramsim.a $(consts_header)
 	cd $(sim_dir) && \
+        rm -rf csrc && \
 	$(VCS) $(VCS_OPTS) -o $(simv_debug) \
 	+define+DEBUG -debug_pp \
 
diff --git a/vsrc/rocketTestHarness.v b/vsrc/rocketTestHarness.v
index 42aa720d..204304d7 100644
--- a/vsrc/rocketTestHarness.v
+++ b/vsrc/rocketTestHarness.v
@@ -1,12 +1,5 @@
 // See LICENSE for license details.
 
-extern "A" void htif_init
-(
-  input reg [31:0] n_mem_channel,
-  input reg [31:0] htif_width,
-  input reg [31:0] mem_width
-);
-
 extern "A" void htif_fini(input reg failure);
 
 extern "A" void htif_tick
@@ -241,7 +234,6 @@ module rocketTestHarness;
       $readmemh(loadmem, mem.ram);
 `endif
     verbose = $test$plusargs("verbose");
-    htif_init(n_mem_channel, htif_width, mem_width);
 `ifdef DEBUG
     stats_active = $test$plusargs("stats");
     if ($value$plusargs("vcdplusfile=%s", vcdplusfile))