riscv/rocket-chip
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config: use Field defaults over Config defaults

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Also rename some keys that had the same class name as their value's class name.
This commit is contained in:
Henry Cook
2017-09-08 18:33:44 -07:00
parent a7540d35b7
commit b86f4b9bb7
18 changed files with 57 additions and 68 deletions
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4
src/main/scala/devices/tilelink/Clint.scala
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@ -30,7 +30,7 @@ case class ClintParams(baseAddress: BigInt = 0x02000000, intStages: Int = 0)
def address = AddressSet(baseAddress, ClintConsts.size-1)
}
case object ClintParams extends Field[ClintParams]
case object ClintKey extends Field(ClintParams())
class CoreplexLocalInterrupter(params: ClintParams)(implicit p: Parameters) extends LazyModule
{
@ -96,6 +96,6 @@ class CoreplexLocalInterrupter(params: ClintParams)(implicit p: Parameters) exte
/** Trait that will connect a Clint to a coreplex */
trait HasPeripheryClint extends HasPeripheryBus {
val clint = LazyModule(new CoreplexLocalInterrupter(p(ClintParams)))
val clint = LazyModule(new CoreplexLocalInterrupter(p(ClintKey)))
clint.node := pbus.toVariableWidthSlaves
}

4
src/main/scala/devices/tilelink/Plic.scala
View File

@ -58,7 +58,7 @@ case class PLICParams(baseAddress: BigInt = 0xC000000, maxPriorities: Int = 7, i
def address = AddressSet(baseAddress, PLICConsts.size-1)
}
case object PLICParams extends Field[PLICParams]
case object PLICKey extends Field(PLICParams())
/** Platform-Level Interrupt Controller */
class TLPLIC(params: PLICParams)(implicit p: Parameters) extends LazyModule
@ -238,7 +238,7 @@ class TLPLIC(params: PLICParams)(implicit p: Parameters) extends LazyModule
/** Trait that will connect a PLIC to a coreplex */
trait HasPeripheryPLIC extends HasInterruptBus with HasPeripheryBus {
val plic = LazyModule(new TLPLIC(p(PLICParams)))
val plic = LazyModule(new TLPLIC(p(PLICKey)))
plic.node := pbus.toVariableWidthSlaves
plic.intnode := ibus.toPLIC
}