riscv/rocket-chip
1
0 Fork 0
Code Releases Activity

copyright: ran scripts/modify-copyright

Browse Source
This commit is contained in:
Wesley W. Terpstra committed 2016-11-27 22:15:43 -08:00
1 parent d4708694ea
commit b7963eca4e
178 files changed
+296 -120
Download Patch File Download Diff File Expand all files Collapse all files

No files matched your search

vsrc/AsyncResetReg.v
+1 -1
View File
@@ -1,4 +1,4 @@
// See LICENSE.SiFive for license details.
/** This black-boxes an Async Reset
* Reg.
vsrc/DebugTransportModuleJtag.v
Executable → Regular
+1 -1
View File
@@ -1,4 +1,4 @@
// See LICENSE.SiFive for license details.
module DebugTransportModuleJtag (
vsrc/SimDTM.v
+1 -1
View File
@@ -1,4 +1,4 @@
// See LICENSE for license details.
// See LICENSE.SiFive for license details.
import "DPI-C" function int debug_tick
(
vsrc/TestDriver.v
+1 -1
View File
@@ -1,4 +1,4 @@
// See LICENSE for license details.
// See LICENSE.SiFive for license details.
`ifndef RESET_DELAY
`define RESET_DELAY 777.7
vsrc/jtag_vpi.v
+2
View File
@@ -1,3 +1,5 @@
// See LICENSE.SiFive for license details.
/*
* TCP/IP controlled VPI JTAG Interface.
* Based on Julius Baxter's work on jp_vpi.c