riscv/rocket-chip
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Turn off virtual memory inside RoCC base class

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This commit is contained in:
Andrew Waterman
2013-09-24 13:53:49 -07:00
parent 3532ae0b79
commit adc386f889
1 changed files with 2 additions and 1 deletions
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3
rocket/src/main/scala/rocc.scala
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@@ -47,6 +47,8 @@ class RoCCInterface(implicit conf: RocketConfiguration) extends Bundle
abstract class RoCC(conf: RocketConfiguration) extends Module
{
val io = new RoCCInterface()(conf)
io.mem.req.bits.phys := Bool(true) // don't perform address translation
}
class AccumulatorExample(conf: RocketConfiguration) extends RoCC(conf)
@@ -109,5 +111,4 @@ class AccumulatorExample(conf: RocketConfiguration) extends RoCC(conf)
io.mem.req.bits.cmd := M_XRD // perform a load (M_XWR for stores)
io.mem.req.bits.typ := MT_D // D = 8 bytes, W = 4, H = 2, B = 1
io.mem.req.bits.data := Bits(0) // we're not performing any stores...
io.mem.req.bits.phys := Bool(true) // don't perform address translation
}