riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

diplomacy: provide default clock/reset for LazyRawModuleImp

Browse Source
This commit is contained in:
Yunsup Lee 2017-08-06 13:40:07 -07:00
parent 6389120dbd
commit aa60c6944b
1 changed files with 12 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
src/main/scala/diplomacy/LazyModule.scala
View File

@ -3,7 +3,7 @@
package freechips.rocketchip.diplomacy package freechips.rocketchip.diplomacy
import Chisel._ import Chisel._
import chisel3.experimental.{BaseModule, RawModule, MultiIOModule} import chisel3.experimental.{BaseModule, RawModule, MultiIOModule, withClockAndReset}
import chisel3.internal.sourceinfo.{SourceInfo, SourceLine, UnlocatableSourceInfo} import chisel3.internal.sourceinfo.{SourceInfo, SourceLine, UnlocatableSourceInfo}
import freechips.rocketchip.config.Parameters import freechips.rocketchip.config.Parameters
@ -151,13 +151,19 @@ trait LazyModuleImpLike extends BaseModule
override def desiredName = wrapper.moduleName override def desiredName = wrapper.moduleName
suggestName(wrapper.instanceName) suggestName(wrapper.instanceName)
wrapper.instantiate()
implicit val p = wrapper.p implicit val p = wrapper.p
} }
abstract class LazyModuleImp(val wrapper: LazyModule) extends Module with LazyModuleImpLike abstract class LazyModuleImp(val wrapper: LazyModule) extends Module with LazyModuleImpLike {
wrapper.instantiate()
}
abstract class LazyMultiIOModuleImp(val wrapper: LazyModule) extends MultiIOModule with LazyModuleImpLike abstract class LazyMultiIOModuleImp(val wrapper: LazyModule) extends MultiIOModule with LazyModuleImpLike {
wrapper.instantiate()
}
abstract class LazyRawModuleImp(val wrapper: LazyModule) extends RawModule with LazyModuleImpLike abstract class LazyRawModuleImp(val wrapper: LazyModule) extends RawModule with LazyModuleImpLike {
withClockAndReset(Bool(false).asClock, Bool(true)) {
wrapper.instantiate()
}
}