riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

ioDecoupled -> FIFOIO, ioPipe -> PipeIO

Browse Source
This commit is contained in:
Huy Vo
2012-06-06 18:22:56 -07:00
parent 04304fe788
commit a99cebb483
9 changed files with 86 additions and 86 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
rocket/src/main/scala/util.scala
View File

@ -27,9 +27,9 @@ class Mux1H [T <: Data](n: Int)(gen: => T) extends Component
}
class ioLockingArbiter[T <: Data](n: Int)(data: => T) extends Bundle {
val in = Vec(n) { (new ioDecoupled()) { data } }.flip
val in = Vec(n) { (new FIFOIO()) { data } }.flip
val lock = Vec(n) { Bool() }.asInput
val out = (new ioDecoupled()) { data }
val out = (new FIFOIO()) { data }
}
class LockingArbiter[T <: Data](n: Int)(data: => T) extends Component {