riscv/rocket-chip
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diplomacy: use new node style chaining

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This commit is contained in:
Wesley W. Terpstra
2017-10-27 01:13:19 -07:00
parent 6aac658184
commit a954f020a9
19 changed files with 134 additions and 132 deletions
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14
src/main/scala/amba/apb/Test.scala
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@ -24,15 +24,15 @@ class APBFuzzBridge(aFlow: Boolean, txns: Int)(implicit p: Parameters) extends L
val ram = LazyModule(new APBRAM(AddressSet(0x0, 0xff)))
val gpio = LazyModule(new RRTest0(0x100))
model.node := fuzz.node
ram.node := xbar.node
gpio.node := xbar.node
xbar.node :=
TLToAPB(aFlow)(
TLDelayer(0.2)(
TLBuffer(BufferParams.flow)(
TLDelayer(0.2)(
model.node))))
(xbar.node
:= TLToAPB(aFlow)
:= TLDelayer(0.2)
:= TLBuffer(BufferParams.flow)
:= TLDelayer(0.2)
:= model.node
:= fuzz.node)
lazy val module = new LazyModuleImp(this) with UnitTestModule {
io.finished := fuzz.module.io.finished