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RegisterRouterTest: start up with 0 in registers to make VIP testing easier

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This commit is contained in:
Wesley W. Terpstra 2016-12-14 15:38:08 -08:00
parent 9d50704b64
commit a5b8fc2317
1 changed files with 2 additions and 2 deletions
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4
src/main/scala/uncore/tilelink2/RegisterRouterTest.scala
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@ -31,7 +31,7 @@ class RRTestCombinational(val bits: Int, rvalid: Bool => Bool, wready: Bool => B
val wdata = UInt(INPUT, width = bits) val wdata = UInt(INPUT, width = bits)
} }
val reg = Reg(UInt(width = bits)) val reg = RegInit(UInt(0, width = bits))
val rvalid_s = rvalid(io.rready) val rvalid_s = rvalid(io.rready)
val wready_s = wready(io.wvalid) val wready_s = wready(io.wvalid)
@ -87,7 +87,7 @@ class RRTestRequest(val bits: Int,
val (riready, rovalid, _) = rflow(io.rivalid, io.roready, UInt(0, width = 1)) val (riready, rovalid, _) = rflow(io.rivalid, io.roready, UInt(0, width = 1))
val (wiready, wovalid, wdata) = wflow(io.wivalid, io.woready, io.wdata) val (wiready, wovalid, wdata) = wflow(io.wivalid, io.woready, io.wdata)
val reg = Reg(UInt(width = bits)) val reg = RegInit(UInt(0, width = bits))
io.riready := riready io.riready := riready
io.rovalid := rovalid io.rovalid := rovalid