riscv/rocket-chip
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update chisel and remove SRAM_READ_LATENCY

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This commit is contained in:
Andrew Waterman
2012-01-23 20:59:38 -08:00
parent 8766438bb9
commit a5a020f97b
5 changed files with 20 additions and 28 deletions
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2
rocket/src/main/scala/consts.scala
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@ -210,8 +210,6 @@ object Constants
val HAVE_RVC = Bool(false);
val HAVE_FPU = Bool(false);
val HAVE_VEC = Bool(false);
val SRAM_READ_LATENCY = 0;
}
}