invalidate I$ prefetcher when invalidating I$
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		| @@ -19,6 +19,7 @@ class ioIPrefetcherMem(view: List[String] = null) extends Bundle (view) | ||||
| class ioIPrefetcher extends Bundle() { | ||||
|   val icache = new ioICache(); | ||||
|   val mem = new ioIPrefetcherMem(); | ||||
|   val invalidate = Bool(INPUT) | ||||
| } | ||||
|  | ||||
| class rocketIPrefetcher extends Component() { | ||||
| @@ -84,6 +85,10 @@ class rocketIPrefetcher extends Component() { | ||||
|       when (fill_done.toBool & ip_mem_resp_val.toBool) { state := s_req_wait; } | ||||
|     } | ||||
|   } | ||||
|  | ||||
|   when (io.invalidate) { | ||||
|     state := s_invalid | ||||
|   } | ||||
| } | ||||
|  | ||||
| } | ||||
|   | ||||
| @@ -30,6 +30,7 @@ class Top() extends Component { | ||||
|   cpu.io.debug      <> io.debug; | ||||
|   cpu.io.console    <> io.console; | ||||
|  | ||||
|   icache_pf.io.invalidate := cpu.io.imem.invalidate | ||||
|   icache.io.mem     <> icache_pf.io.icache; | ||||
|   cpu.io.imem       <> icache.io.cpu; | ||||
|   cpu.io.vimem      <> vicache.io.cpu; | ||||
|   | ||||
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