BroadcastHub can be elaborated by C and vlsi backends
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@ -198,9 +198,9 @@ class XactTracker(id: Int) extends Component with CoherencePolicy {
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val busy = Bool(OUTPUT)
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val addr = Bits(PADDR_BITS, OUTPUT)
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val init_tile_id = Bits(TILE_ID_BITS, OUTPUT)
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val p_rep_tile_id = Bits(log2up(NTILES), INPUT)
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val p_rep_tile_id = Bits(TILE_ID_BITS, OUTPUT)
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val tile_xact_id = Bits(TILE_XACT_ID_BITS, OUTPUT)
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val sharer_count = Bits(TILE_ID_BITS, OUTPUT)
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val sharer_count = Bits(TILE_ID_BITS+1, OUTPUT)
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val t_type = Bits(TTYPE_BITS, OUTPUT)
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val push_p_req = Bits(NTILES, OUTPUT)
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val pop_p_rep = Bits(NTILES, OUTPUT)
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@ -411,8 +411,8 @@ class CoherenceHubBroadcast extends CoherenceHub {
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val send_x_rep_ack_arr = Vec(NGLOBAL_XACTS){ Wire(){Bool()} }
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val do_free_arr = Vec(NGLOBAL_XACTS){ Wire(){Bool()} }
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val p_rep_cnt_dec_arr = Vec(NGLOBAL_XACTS){ Wire(){Bits(width=NTILES)} }
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val p_req_cnt_inc_arr = Vec(NGLOBAL_XACTS){ Wire(){Bits(width=NTILES)} }
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val p_rep_cnt_dec_arr = VecBuf(NGLOBAL_XACTS){ Vec(NTILES){ Wire(){Bool()} } }
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val p_req_cnt_inc_arr = VecBuf(NGLOBAL_XACTS){ Vec(NTILES){ Wire(){Bool()} } }
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val sent_x_rep_ack_arr = Vec(NGLOBAL_XACTS){ Wire(){Bool()} }
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for( i <- 0 until NGLOBAL_XACTS) {
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@ -424,14 +424,16 @@ class CoherenceHubBroadcast extends CoherenceHub {
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t_type_arr(i) := t.t_type
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sh_count_arr(i) := t.sharer_count
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send_x_rep_ack_arr(i) := t.send_x_rep_ack
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do_free_arr(i) := Bool(false)
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p_rep_cnt_dec_arr(i) := Bits(0)
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p_req_cnt_inc_arr(i) := Bits(0)
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sent_x_rep_ack_arr(i) := Bool(false)
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t.xact_finish := do_free_arr(i)
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t.p_rep_cnt_dec := p_rep_cnt_dec_arr(i)
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t.p_req_cnt_inc := p_req_cnt_inc_arr(i)
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t.p_rep_cnt_dec := p_rep_cnt_dec_arr(i).toBits
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t.p_req_cnt_inc := p_req_cnt_inc_arr(i).toBits
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t.sent_x_rep_ack := sent_x_rep_ack_arr(i)
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do_free_arr(i) := Bool(false)
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sent_x_rep_ack_arr(i) := Bool(false)
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for( j <- 0 until NTILES) {
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p_rep_cnt_dec_arr(i)(j) := Bool(false)
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p_req_cnt_inc_arr(i)(j) := Bool(false)
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}
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}
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// Free finished transactions
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@ -495,8 +497,7 @@ class CoherenceHubBroadcast extends CoherenceHub {
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trackerList(i).io.p_rep_data.bits := io.tiles(trackerList(i).io.p_rep_tile_id).probe_rep_data.bits
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for( j <- 0 until NTILES) {
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val p_rep = io.tiles(j).probe_rep
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val dec = p_rep.valid && (p_rep.bits.global_xact_id === UFix(i))
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p_rep_cnt_dec_arr(UFix(i)) := p_rep_cnt_dec_arr(UFix(i)).bitSet(UFix(j), dec)
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p_rep_cnt_dec_arr(i)(j) := p_rep.valid && (p_rep.bits.global_xact_id === UFix(i))
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}
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}
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@ -556,7 +557,7 @@ class CoherenceHubBroadcast extends CoherenceHub {
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val t = trackerList(i).io
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p_req_arb_arr(j).io.in(i).bits := t.probe_req.bits
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p_req_arb_arr(j).io.in(i).valid := t.probe_req.valid && t.push_p_req(j)
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p_rep_cnt_dec_arr(i) = p_rep_cnt_dec_arr(i).bitSet(UFix(j), p_req_arb_arr(j).io.in(i).ready)
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p_req_cnt_inc_arr(i)(j) := p_req_arb_arr(j).io.in(i).ready
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}
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p_req_arb_arr(j).io.out <> io.tiles(j).probe_req
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}
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