riscv/rocket-chip
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Merge remote-tracking branch 'origin/master' into ss-frontend

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Conflicts:
	src/main/scala/btb.scala
	src/main/scala/core.scala
This commit is contained in:
Christopher Celio
2014-10-03 04:22:58 -07:00
parent 180d3d365d 655f9ae1af
commit 99614e37aa
8 changed files with 86 additions and 72 deletions
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5
rocket/src/main/scala/icache.scala
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@ -43,7 +43,7 @@ class Frontend extends FrontendModule
val cpu = new CPUFrontendIO().flip
val mem = new UncachedTileLinkIO
}
val btb = Module(new BTB)
val icache = Module(new ICache)
val tlb = Module(new TLB(params(NITLBEntries)))
@ -84,7 +84,8 @@ class Frontend extends FrontendModule
s2_valid := Bool(false)
}
btb.io.req := s1_pc & SInt(-coreInstBytes)
btb.io.req.valid := !stall && !icmiss
btb.io.req.bits.addr := s1_pc & SInt(-coreInstBytes)
btb.io.update := io.cpu.btb_update
btb.io.invalidate := io.cpu.invalidate || io.cpu.ptw.invalidate