riscv/rocket-chip
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Merge pull request #41 from ucb-bar/regressions

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Support torture regressions
This commit is contained in:
Palmer Dabbelt 2016-02-01 18:39:28 -08:00
commit 97640f099d
6 changed files with 78 additions and 17 deletions
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3
.gitmodules vendored
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@ -31,3 +31,6 @@
[submodule "groundtest"] [submodule "groundtest"]
path = groundtest path = groundtest
url = https://github.com/ucb-bar/groundtest.git url = https://github.com/ucb-bar/groundtest.git
[submodule "torture"]
path = torture
url = https://github.com/ucb-bar/riscv-torture.git

2
fsim/Makefile
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@ -21,7 +21,9 @@ TB ?= rocketTestHarness
include $(base_dir)/Makefrag include $(base_dir)/Makefrag
include $(sim_dir)/Makefrag include $(sim_dir)/Makefrag
ifneq ($(MAKECMDGOALS),clean)
-include $(generated_dir)/$(MODEL).$(CONFIG).d -include $(generated_dir)/$(MODEL).$(CONFIG).d
endif
include $(base_dir)/vsim/Makefrag-verilog include $(base_dir)/vsim/Makefrag-verilog
all: $(simv) all: $(simv)

1
regression/.gitignore vendored
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@ -1,2 +1,3 @@
/install /install
/stamps /stamps
/torture-failures

86
regression/Makefile
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@ -1,8 +1,19 @@
# The default target # The default target, which runs all regression targets.
regression: vsim-asm-tests vsim-bmark-tests torture regression: vsim-regression fsim-regression emulator-regression
# Regression targets for the various simulators.
%-regression: %-asm-tests %-bmark-tests
# Some targets can run torture
vsim-regression: vsim-torture
emulator-regression: emulator-torture
ifeq ($(CONFIG),) ifeq ($(CONFIG),)
$(error Set CONFIG to the configuration to build) $(error Set CONFIG to the rocket-chip configuration to elaborate and test)
endif
ifeq ($(TORTURE_CONFIG),)
$(error Set TORTURE_CONFIG to the torture configuration to run)
endif endif
# The top-level directory that contains rocket-chip # The top-level directory that contains rocket-chip
@ -11,15 +22,41 @@ TOP ?= ..
# The directory that the tools get built into. # The directory that the tools get built into.
RISCV ?= install RISCV ?= install
# Torture saves the failing tests into a directory, which defaults to just somehing inside the regressions directory.
TORTURE_SAVE_DIR ?= torture-failures
# Removes all the build stamps from the current config
.PHONY: clean
clean:
rm -rf stamps $(abspath $(RISCV))
$(MAKE) RISCV=$(RISCV) -C $(abspath $(TOP)/vsim) clean
$(MAKE) RISCV=$(RISCV) -C $(abspath $(TOP)/fsim) clean
$(MAKE) RISCV=$(RISCV) -C $(abspath $(TOP)/emulator) clean
# These are the named regression targets. While it's expected you run them in # These are the named regression targets. While it's expected you run them in
# this order, since there's dependencies for everything it doesn't actually # this order, since there's dependencies for everything it doesn't actually
# matter. # matter. They're here to make running the various targets from the
# commandline a bit cleaner.
submodules: stamps/submodules.stamp submodules: stamps/submodules.stamp
tools: stamps/tools.stamp tools: stamps/tools.stamp
vsim: stamps/vsim.stamp
vsim-asm-tests: stamps/vsim-asm-tests.stamp emulator-debug: stamps/$(CONFIG)/emulator-debug.stamp
vsim-bmark-tests: stamps/vsim-bmark-tests.stamp emulator-ndebug: stamps/$(CONFIG)/emulator-ndebug.stamp
torture: stamps/torture.stamp emulator-asm-tests: stamps/$(CONFIG)/emulator-asm-tests.stamp
emulator-bmark-tests: stamps/$(CONFIG)/emulator-bmark-tests.stamp
emulator-torture: stamps/$(CONFIG)/emulator-torture-$(TORTURE_CONFIG).stamp
vsim-debug: stamps/$(CONFIG)/vsim-debug.stamp
vsim-ndebug: stamps/$(CONFIG)/vsim-ndebug.stamp
vsim-asm-tests: stamps/$(CONFIG)/vsim-asm-tests.stamp
vsim-bmark-tests: stamps/$(CONFIG)/vsim-bmark-tests.stamp
vsim-torture: stamps/$(CONFIG)/vsim-torture-$(TORTURE_CONFIG).stamp
fsim-debug: stamps/$(CONFIG)/fsim-debug.stamp
fsim-ndebug: stamps/$(CONFIG)/fsim-ndebug.stamp
fsim-asm-tests: stamps/$(CONFIG)/fsim-asm-tests.stamp
fsim-bmark-tests: stamps/$(CONFIG)/fsim-bmark-tests.stamp
fsim-torture: stamps/$(CONFIG)/fsim-torture-$(TORTURE_CONFIG).stamp
# Checks out all the rocket-chip submodules # Checks out all the rocket-chip submodules
stamps/submodules.stamp: stamps/submodules.stamp:
@ -33,19 +70,36 @@ stamps/tools.stamp: stamps/submodules.stamp
+cd $(abspath $(TOP))/riscv-tools; RISCV=$(abspath $(RISCV)) ./build.sh +cd $(abspath $(TOP))/riscv-tools; RISCV=$(abspath $(RISCV)) ./build.sh
touch $@ touch $@
# Builds the verilog RTL simulator # Builds the various simulators
stamps/vsim.stamp: stamps/submodules.stamp stamps/$(CONFIG)/%-ndebug.stamp: stamps/submodules.stamp stamps/tools.stamp
mkdir -p $(dir $@) mkdir -p $(dir $@)
$(MAKE) -C $(abspath $(TOP))/vsim CONFIG=$(CONFIG) RISCV=$(abspath $(RISCV)) +flock -x $(dir $@)/chisel-lock $(MAKE) -C $(abspath $(TOP))/$(patsubst stamps/$(CONFIG)/%-ndebug.stamp,%,$@) CONFIG=$(CONFIG) RISCV=$(abspath $(RISCV))
touch $@ touch $@
# Runs some tests using the verilog RTL simulator stamps/$(CONFIG)/%-debug.stamp: stamps/submodules.stamp stamps/tools.stamp
stamps/vsim-asm-tests.stamp: stamps/vsim.stamp stamps/tools.stamp stamps/submodules.stamp
mkdir -p $(dir $@) mkdir -p $(dir $@)
$(MAKE) -C $(abspath $(TOP))/vsim CONFIG=$(CONFIG) RISCV=$(abspath $(RISCV)) run-asm-tests +flock -x $(dir $@)/chisel-lock $(MAKE) -C $(abspath $(TOP))/$(patsubst stamps/$(CONFIG)/%-debug.stamp,%,$@) CONFIG=$(CONFIG) RISCV=$(abspath $(RISCV)) debug
touch $@ touch $@
stamps/vsim-bmark-tests.stamp: stamps/vsim.stamp stamps/tools.stamp stamps/submodules.stamp # Runs tests on one of the simulators
stamps/$(CONFIG)/%-asm-tests.stamp: stamps/$(CONFIG)/%-ndebug.stamp stamps/tools.stamp stamps/submodules.stamp
mkdir -p $(dir $@) mkdir -p $(dir $@)
$(MAKE) -C $(abspath $(TOP))/vsim CONFIG=$(CONFIG) RISCV=$(abspath $(RISCV)) run-bmark-tests $(MAKE) -C $(abspath $(TOP))/$(patsubst stamps/$(CONFIG)/%-asm-tests.stamp,%,$@) CONFIG=$(CONFIG) RISCV=$(abspath $(RISCV)) run-asm-tests
touch $@
stamps/$(CONFIG)/%-bmark-tests.stamp: stamps/$(CONFIG)/%-ndebug.stamp stamps/tools.stamp stamps/submodules.stamp
mkdir -p $(dir $@)
$(MAKE) -C $(abspath $(TOP))/$(patsubst stamps/$(CONFIG)/%-bmark-tests.stamp,%,$@) CONFIG=$(CONFIG) RISCV=$(abspath $(RISCV)) run-bmark-tests
touch $@
# The torture tests run subtly differently on the different targets, so they
# don't have pattern rules like everything else does.
stamps/$(CONFIG)/vsim-torture-$(TORTURE_CONFIG).stamp: stamps/$(CONFIG)/vsim-debug.stamp stamps/$(CONFIG)/vsim-ndebug.stamp
mkdir -p $(dir $@)
$(MAKE) -C $(abspath $(TOP))/torture rnight RTL_CONFIG=$(CONFIG) RISCV=$(abspath $(RISCV)) PATH="$(abspath $(RISCV)/bin:$(PATH))" OPTIONS="-C $(abspath $(TOP)/torture/config/$(TORTURE_CONFIG).config) -p $(abspath $(TORTURE_SAVE_DIR)) -m 30 -t 10"
touch $@
stamps/$(CONFIG)/emulator-torture-$(TORTURE_CONFIG).stamp: stamps/$(CONFIG)/emulator-debug.stamp stamps/$(CONFIG)/emulator-ndebug.stamp
mkdir -p $(dir $@)
$(MAKE) -C $(abspath $(TOP))/torture cnight RTL_CONFIG=$(CONFIG) RISCV=$(abspath $(RISCV)) PATH="$(abspath $(RISCV)/bin:$(PATH))" OPTIONS="-C $(abspath $(TOP)/torture/config/$(TORTURE_CONFIG).config) -p $(abspath $(TORTURE_SAVE_DIR)) -m 30 -t 10"
touch $@ touch $@

2
riscv-tools

@ -1 +1 @@
Subproject commit 9d4890db25273b141206a54c1083ea03981d4394 Subproject commit 2065218d0a8c25ea721f8036d9098eb91a31920c

1
torture Submodule

@ -0,0 +1 @@
Subproject commit 9e0503a565dcb6dce2d903b6899459698166362b