From e185fe685081579c63cd3a1e19e65ea7d9f59891 Mon Sep 17 00:00:00 2001 From: Palmer Dabbelt Date: Thu, 28 Jan 2016 18:39:33 -0800 Subject: [PATCH 1/5] Add targets for emulator and fsim regressions This change allows the other simulation targets (the emulator and the FPGA simulator) to be run just like the Verilog simulator could be before. --- regression/Makefile | 67 ++++++++++++++++++++++++++++++++++----------- 1 file changed, 51 insertions(+), 16 deletions(-) diff --git a/regression/Makefile b/regression/Makefile index a22012c5..88c38d8b 100644 --- a/regression/Makefile +++ b/regression/Makefile @@ -1,8 +1,15 @@ -# The default target -regression: vsim-asm-tests vsim-bmark-tests torture +# The default target, which runs all regression targets. +regression: vsim-regression fsim-regression emulator-regression + +# Regression targets for the various simulators. +%-regression: %-asm-tests %-bmark-tests ifeq ($(CONFIG),) -$(error Set CONFIG to the configuration to build) +$(error Set CONFIG to the rocket-chip configuration to elaborate and test) +endif + +ifeq ($(TORTURE_CONFIG),) +$(error Set TORTURE_CONFIG to the torture configuration to run) endif # The top-level directory that contains rocket-chip @@ -11,15 +18,38 @@ TOP ?= .. # The directory that the tools get built into. RISCV ?= install +# Torture saves the failing tests into a directory, which defaults to just somehing inside the regressions directory. +TORTURE_SAVE_DIR ?= torture-failures + +# Removes all the build stamps from the current config +.PHONY: clean +clean: + rm -rf stamps $(abspath $(RISCV)) + $(MAKE) -C $(abspath $(TOP)/vsim) clean + $(MAKE) -C $(abspath $(TOP)/fsim) clean + $(MAKE) -C $(abspath $(TOP)/emulator) clean + # These are the named regression targets. While it's expected you run them in # this order, since there's dependencies for everything it doesn't actually -# matter. +# matter. They're here to make running the various targets from the +# commandline a bit cleaner. submodules: stamps/submodules.stamp tools: stamps/tools.stamp -vsim: stamps/vsim.stamp -vsim-asm-tests: stamps/vsim-asm-tests.stamp -vsim-bmark-tests: stamps/vsim-bmark-tests.stamp -torture: stamps/torture.stamp + +emulator-debug: stamps/$(CONFIG)/emulator-debug.stamp +emulator-ndebug: stamps/$(CONFIG)/emulator-ndebug.stamp +emulator-asm-tests: stamps/$(CONFIG)/emulator-asm-tests.stamp +emulator-bmark-tests: stamps/$(CONFIG)/emulator-bmark-tests.stamp + +vsim-debug: stamps/$(CONFIG)/vsim-debug.stamp +vsim-ndebug: stamps/$(CONFIG)/vsim-ndebug.stamp +vsim-asm-tests: stamps/$(CONFIG)/vsim-asm-tests.stamp +vsim-bmark-tests: stamps/$(CONFIG)/vsim-bmark-tests.stamp + +fsim-debug: stamps/$(CONFIG)/fsim-debug.stamp +fsim-ndebug: stamps/$(CONFIG)/fsim-ndebug.stamp +fsim-asm-tests: stamps/$(CONFIG)/fsim-asm-tests.stamp +fsim-bmark-tests: stamps/$(CONFIG)/fsim-bmark-tests.stamp # Checks out all the rocket-chip submodules stamps/submodules.stamp: @@ -33,19 +63,24 @@ stamps/tools.stamp: stamps/submodules.stamp +cd $(abspath $(TOP))/riscv-tools; RISCV=$(abspath $(RISCV)) ./build.sh touch $@ -# Builds the verilog RTL simulator -stamps/vsim.stamp: stamps/submodules.stamp +# Builds the various simulators +stamps/$(CONFIG)/%-ndebug.stamp: stamps/submodules.stamp stamps/tools.stamp mkdir -p $(dir $@) - $(MAKE) -C $(abspath $(TOP))/vsim CONFIG=$(CONFIG) RISCV=$(abspath $(RISCV)) + $(MAKE) -C $(abspath $(TOP))/$(patsubst stamps/$(CONFIG)/%-ndebug.stamp,%,$@) CONFIG=$(CONFIG) RISCV=$(abspath $(RISCV)) touch $@ -# Runs some tests using the verilog RTL simulator -stamps/vsim-asm-tests.stamp: stamps/vsim.stamp stamps/tools.stamp stamps/submodules.stamp +stamps/$(CONFIG)/%-debug.stamp: stamps/submodules.stamp stamps/tools.stamp mkdir -p $(dir $@) - $(MAKE) -C $(abspath $(TOP))/vsim CONFIG=$(CONFIG) RISCV=$(abspath $(RISCV)) run-asm-tests + $(MAKE) -C $(abspath $(TOP))/$(patsubst stamps/$(CONFIG)/%-debug.stamp,%,$@) CONFIG=$(CONFIG) RISCV=$(abspath $(RISCV)) debug touch $@ -stamps/vsim-bmark-tests.stamp: stamps/vsim.stamp stamps/tools.stamp stamps/submodules.stamp +# Runs tests on one of the simulators +stamps/$(CONFIG)/%-asm-tests.stamp: stamps/$(CONFIG)/%-ndebug.stamp stamps/tools.stamp stamps/submodules.stamp mkdir -p $(dir $@) - $(MAKE) -C $(abspath $(TOP))/vsim CONFIG=$(CONFIG) RISCV=$(abspath $(RISCV)) run-bmark-tests + $(MAKE) -C $(abspath $(TOP))/$(patsubst stamps/$(CONFIG)/%-asm-tests.stamp,%,$@) CONFIG=$(CONFIG) RISCV=$(abspath $(RISCV)) run-asm-tests + touch $@ + +stamps/$(CONFIG)/%-bmark-tests.stamp: stamps/$(CONFIG)/%-ndebug.stamp stamps/tools.stamp stamps/submodules.stamp + mkdir -p $(dir $@) + $(MAKE) -C $(abspath $(TOP))/$(patsubst stamps/$(CONFIG)/%-bmark-tests.stamp,%,$@) CONFIG=$(CONFIG) RISCV=$(abspath $(RISCV)) run-bmark-tests touch $@ From c9a2b7d109c1307c83dcebaa8592ec10dda5fa58 Mon Sep 17 00:00:00 2001 From: Palmer Dabbelt Date: Sat, 30 Jan 2016 20:54:41 -0800 Subject: [PATCH 2/5] Add torture as part of the regression Since the latest Spike fix my torture runs are succeeding, so I can now run it as part of the regression flow. --- .gitmodules | 3 +++ regression/.gitignore | 1 + regression/Makefile | 19 +++++++++++++++++++ torture | 1 + 4 files changed, 24 insertions(+) create mode 160000 torture diff --git a/.gitmodules b/.gitmodules index 0ea3dbc0..c6f9f713 100644 --- a/.gitmodules +++ b/.gitmodules @@ -31,3 +31,6 @@ [submodule "groundtest"] path = groundtest url = https://github.com/ucb-bar/groundtest.git +[submodule "torture"] + path = torture + url = https://github.com/ucb-bar/riscv-torture.git diff --git a/regression/.gitignore b/regression/.gitignore index 0df50ec2..6f5a28b0 100644 --- a/regression/.gitignore +++ b/regression/.gitignore @@ -1,2 +1,3 @@ /install /stamps +/torture-failures diff --git a/regression/Makefile b/regression/Makefile index 88c38d8b..2a25f022 100644 --- a/regression/Makefile +++ b/regression/Makefile @@ -4,6 +4,10 @@ regression: vsim-regression fsim-regression emulator-regression # Regression targets for the various simulators. %-regression: %-asm-tests %-bmark-tests +# Some targets can run torture +vsim-regression: vsim-torture +emulator-regression: emulator-torture + ifeq ($(CONFIG),) $(error Set CONFIG to the rocket-chip configuration to elaborate and test) endif @@ -40,16 +44,19 @@ emulator-debug: stamps/$(CONFIG)/emulator-debug.stamp emulator-ndebug: stamps/$(CONFIG)/emulator-ndebug.stamp emulator-asm-tests: stamps/$(CONFIG)/emulator-asm-tests.stamp emulator-bmark-tests: stamps/$(CONFIG)/emulator-bmark-tests.stamp +emulator-torture: stamps/$(CONFIG)/emulator-torture-$(TORTURE_CONFIG).stamp vsim-debug: stamps/$(CONFIG)/vsim-debug.stamp vsim-ndebug: stamps/$(CONFIG)/vsim-ndebug.stamp vsim-asm-tests: stamps/$(CONFIG)/vsim-asm-tests.stamp vsim-bmark-tests: stamps/$(CONFIG)/vsim-bmark-tests.stamp +vsim-torture: stamps/$(CONFIG)/vsim-torture-$(TORTURE_CONFIG).stamp fsim-debug: stamps/$(CONFIG)/fsim-debug.stamp fsim-ndebug: stamps/$(CONFIG)/fsim-ndebug.stamp fsim-asm-tests: stamps/$(CONFIG)/fsim-asm-tests.stamp fsim-bmark-tests: stamps/$(CONFIG)/fsim-bmark-tests.stamp +fsim-torture: stamps/$(CONFIG)/fsim-torture-$(TORTURE_CONFIG).stamp # Checks out all the rocket-chip submodules stamps/submodules.stamp: @@ -84,3 +91,15 @@ stamps/$(CONFIG)/%-bmark-tests.stamp: stamps/$(CONFIG)/%-ndebug.stamp stamps/too mkdir -p $(dir $@) $(MAKE) -C $(abspath $(TOP))/$(patsubst stamps/$(CONFIG)/%-bmark-tests.stamp,%,$@) CONFIG=$(CONFIG) RISCV=$(abspath $(RISCV)) run-bmark-tests touch $@ + +# The torture tests run subtly differently on the different targets, so they +# don't have pattern rules like everything else does. +stamps/$(CONFIG)/vsim-torture-$(TORTURE_CONFIG).stamp: stamps/$(CONFIG)/vsim-debug.stamp stamps/$(CONFIG)/vsim-ndebug.stamp + mkdir -p $(dir $@) + $(MAKE) -C $(abspath $(TOP))/torture rnight RTL_CONFIG=$(CONFIG) RISCV=$(abspath $(RISCV)) PATH="$(abspath $(RISCV)/bin:$(PATH))" OPTIONS="-C $(abspath $(TOP)/torture/config/$(TORTURE_CONFIG).config) -p $(abspath $(TORTURE_SAVE_DIR)) -m 30 -t 10" + touch $@ + +stamps/$(CONFIG)/emulator-torture-$(TORTURE_CONFIG).stamp: stamps/$(CONFIG)/emulator-debug.stamp stamps/$(CONFIG)/emulator-ndebug.stamp + mkdir -p $(dir $@) + $(MAKE) -C $(abspath $(TOP))/torture cnight RTL_CONFIG=$(CONFIG) RISCV=$(abspath $(RISCV)) PATH="$(abspath $(RISCV)/bin:$(PATH))" OPTIONS="-C $(abspath $(TOP)/torture/config/$(TORTURE_CONFIG).config) -p $(abspath $(TORTURE_SAVE_DIR)) -m 30 -t 10" + touch $@ diff --git a/torture b/torture new file mode 160000 index 00000000..9e0503a5 --- /dev/null +++ b/torture @@ -0,0 +1 @@ +Subproject commit 9e0503a565dcb6dce2d903b6899459698166362b From 00465b15c3b0ea5cc0e1772e3cc7dadae02a8e2c Mon Sep 17 00:00:00 2001 From: Palmer Dabbelt Date: Sat, 30 Jan 2016 20:56:00 -0800 Subject: [PATCH 3/5] Allow the regression Makefile to clean all targets --- fsim/Makefile | 2 ++ regression/Makefile | 6 +++--- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/fsim/Makefile b/fsim/Makefile index fe89bfa3..8e765a34 100644 --- a/fsim/Makefile +++ b/fsim/Makefile @@ -21,7 +21,9 @@ TB ?= rocketTestHarness include $(base_dir)/Makefrag include $(sim_dir)/Makefrag +ifneq ($(MAKECMDGOALS),clean) -include $(generated_dir)/$(MODEL).$(CONFIG).d +endif include $(base_dir)/vsim/Makefrag-verilog all: $(simv) diff --git a/regression/Makefile b/regression/Makefile index 2a25f022..30d0d8b6 100644 --- a/regression/Makefile +++ b/regression/Makefile @@ -29,9 +29,9 @@ TORTURE_SAVE_DIR ?= torture-failures .PHONY: clean clean: rm -rf stamps $(abspath $(RISCV)) - $(MAKE) -C $(abspath $(TOP)/vsim) clean - $(MAKE) -C $(abspath $(TOP)/fsim) clean - $(MAKE) -C $(abspath $(TOP)/emulator) clean + $(MAKE) RISCV=$(RISCV) -C $(abspath $(TOP)/vsim) clean + $(MAKE) RISCV=$(RISCV) -C $(abspath $(TOP)/fsim) clean + $(MAKE) RISCV=$(RISCV) -C $(abspath $(TOP)/emulator) clean # These are the named regression targets. While it's expected you run them in # this order, since there's dependencies for everything it doesn't actually From e18759642f44f5ab81ad379768db37f1ffe57ec7 Mon Sep 17 00:00:00 2001 From: Palmer Dabbelt Date: Sat, 30 Jan 2016 20:56:36 -0800 Subject: [PATCH 4/5] Avoid running Chisel in parallel in the same directory It looks like Chisel fails when I try to run it in parallel. This adds a lock file to ensure that only a single Chisel instance is running at a time when running the regressions. --- regression/Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/regression/Makefile b/regression/Makefile index 30d0d8b6..2a5ff90b 100644 --- a/regression/Makefile +++ b/regression/Makefile @@ -73,12 +73,12 @@ stamps/tools.stamp: stamps/submodules.stamp # Builds the various simulators stamps/$(CONFIG)/%-ndebug.stamp: stamps/submodules.stamp stamps/tools.stamp mkdir -p $(dir $@) - $(MAKE) -C $(abspath $(TOP))/$(patsubst stamps/$(CONFIG)/%-ndebug.stamp,%,$@) CONFIG=$(CONFIG) RISCV=$(abspath $(RISCV)) + +flock -x $(dir $@)/chisel-lock $(MAKE) -C $(abspath $(TOP))/$(patsubst stamps/$(CONFIG)/%-ndebug.stamp,%,$@) CONFIG=$(CONFIG) RISCV=$(abspath $(RISCV)) touch $@ stamps/$(CONFIG)/%-debug.stamp: stamps/submodules.stamp stamps/tools.stamp mkdir -p $(dir $@) - $(MAKE) -C $(abspath $(TOP))/$(patsubst stamps/$(CONFIG)/%-debug.stamp,%,$@) CONFIG=$(CONFIG) RISCV=$(abspath $(RISCV)) debug + +flock -x $(dir $@)/chisel-lock $(MAKE) -C $(abspath $(TOP))/$(patsubst stamps/$(CONFIG)/%-debug.stamp,%,$@) CONFIG=$(CONFIG) RISCV=$(abspath $(RISCV)) debug touch $@ # Runs tests on one of the simulators From 5cea4edee275ad4284973bd2b9f7d32d311702a0 Mon Sep 17 00:00:00 2001 From: Palmer Dabbelt Date: Sun, 31 Jan 2016 23:05:57 -0800 Subject: [PATCH 5/5] Bump riscv-tools for torture NaN ISA change --- riscv-tools | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/riscv-tools b/riscv-tools index 9d4890db..2065218d 160000 --- a/riscv-tools +++ b/riscv-tools @@ -1 +1 @@ -Subproject commit 9d4890db25273b141206a54c1083ea03981d4394 +Subproject commit 2065218d0a8c25ea721f8036d9098eb91a31920c