riscv/rocket-chip
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add vector exception infrastructure

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This commit is contained in:
Yunsup Lee
2012-02-25 16:37:56 -08:00
parent 3839e3a318
commit 946e0c6e4e
5 changed files with 26 additions and 0 deletions
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4
rocket/src/main/scala/cpu.scala
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@ -156,6 +156,10 @@ class rocketProc(resetSignal: Bool = null) extends Component(resetSignal)
ctrl.io.vec_iface.vackq_valid := vu.io.vec_ackq.valid
vu.io.vec_ackq.ready := ctrl.io.vec_iface.vackq_ready
// exceptions
// dpath.io.vec_iface.eaddr
// dpath.io.vec_iface.exception
// hooking up vector memory interface
ctrl.io.ext_mem.req_val := vu.io.dmem_req.valid
ctrl.io.ext_mem.req_cmd := vu.io.dmem_req.bits.cmd