add vector exception infrastructure
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@@ -139,6 +139,10 @@ object Constants
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val PCR_FROMHOST = UFix(17, 5);
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val PCR_VECBANK = UFix(18, 5);
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// temporaries for vector, these will go away
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val PCR_VEC_TMP1 = UFix(30, 5)
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val PCR_VEC_TMP2 = UFix(31, 5)
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// definition of bits in PCR status reg
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val SR_ET = 0; // enable traps
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val SR_EF = 1; // enable floating point
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